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Description: SHA-1加密算法的IP核,内涵文档,仿真测试文件-SHA-1 encryption algorithm of the IP core, the connotation of documents, simulation test file
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Size: 6144 |
Author: 徐 |
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Description: sha_1加密运算模块,运算速率100Mbps,规格512位请大家参考-encryption algorithms sha_1 module, computing rate of 100Mbps, the specifications please refer to 512
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Size: 5120 |
Author: 刘文庆 |
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Description: sha1_core_Verilog this is a sha1 function by using Verilog
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Size: 123904 |
Author: 包阔 |
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Description: HMAC — MD 5算法的硬件实现,可以对初学者有一定得帮助。-HMAC- MD 5 algorithm for hardware implementation
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Size: 179200 |
Author: zhangchaoqi |
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Description: SHA1 Verilog code. 8bit interfaces
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Size: 10240 |
Author: Tommy |
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Description: SHA1的VERILOG 实现,内含测试代码,经过了验证 -SHA1 implementation of VERILOG, containing test code, and proven
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Size: 7168 |
Author: zsw |
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Description: SHA1 implementation on FPGA VHDL code
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Size: 3072 |
Author: osman |
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