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[VHDL-FPGA-Verilogshuzizhong2008

Description: 本文描述了数字钟的设计方案和具体的设计步骤及代码,功能比较全面,可以直接用作课程设计!-This paper describes the design of digital clock program and the specific design steps and code, function more comprehensive and can be directly used for curriculum design!
Platform: | Size: 80896 | Author: liuxiaozhong | Hits:

[VHDL-FPGA-Verilogshuzizhong2008

Description: 这时一个关于数字钟的VHDL程序,有计时、校时、报时等功能-When a digital clock on the VHDL program, there is time, school time, timer and other functions
Platform: | Size: 80896 | Author: 吴凯 | Hits:

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