Description: 运用FPGA控制AD9957的操作,调试过,运用VERILOG HDL编写-Use FPGA to control the operation of AD9957, debugging, and use the preparation of VERILOG HDL Platform: |
Size: 904192 |
Author:px99 |
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Description: 用fpga实现的DA转换器,有说明和源码,VDHL文件。
A PLD Based Delta-Sigma DAC
Delta-Sigma modulation is the simple, yet powerful,
technique responsible for the extraordinary
performance and low cost of today s audio CD
players. The simplest Delta-Sigma DAC consists of a
Delta-Sigma modulator and a one bit DAC. Since,
both of these components can be realized using
digital circuits, it is possible to implement a low
precision Delta-Sigma DAC using a PLD.-Using FPGA to achieve the DA converter, has descriptions and source code, VDHL document. A PLD Based Delta-Sigma DACDelta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinaryperformance and low cost of today s audio CDplayers. The simplest Delta-Sigma DAC consists of aDelta-Sigma modulator and a one bit DAC. Since , both of these components can be realized usingdigital circuits, it is possible to implement a lowprecision Delta-Sigma DAC using a PLD. Platform: |
Size: 58368 |
Author:开心 |
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Description: 根据FPGA的∑-Δ D/A转换器的设计与实现策略,∑-Δ DAC的内部仅由2个10位的二进制加法器,1个10位的锁存器和一个D触发器组成,用FPGA实现时只需耗费极少的逻辑资源,即使用最小的FPGA也能实现。这是∑-Δ DAC实现的verilog语言-According to the FPGA Σ-Δ D/A converter design and implementation strategies, Σ-Δ DAC' s internal only by the two 10-bit binary adder, a 10-bit latch and a D flip-flop, with the FPGA implementations consume only minimal logic resources, using the smallest FPGA can achieve. This is the Σ-Δ DAC implementation verilog language! ! ! Platform: |
Size: 1333248 |
Author:王凌 |
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Description: 基础的几个verilog代码实现,讲到case和task的使用。(basic verilog,use case and task ,very usual, i want some help to achieve the design of delta and sigma fractional_n divider.) Platform: |
Size: 88064 |
Author:sana00 |
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