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[Other resource] altera_lcd_controller

Description: quartus II-sopc builder avalon总线LCD控制IPCORE-quartus II-sopc builder avalon Bus LCD controller IP CORE
Platform: | Size: 26888 | Author: 张建 | Hits:

[Other] pio_lcd

Description: 控制LCD的工作，是基于SOPC系统的系统程序。LCD的型号是FYD12864。
Platform: | Size: 3464 | Author: 李聃 | Hits:

[VHDL-FPGA-Verilog] altera_lcd_controller

Description: quartus II-sopc builder avalon总线LCD控制IPCORE-quartus II-sopc builder avalon Bus LCD controller IP CORE
Platform: | Size: 26624 | Author: 张建 | Hits:

[Graph program] altera_tft_lcd_controller

Description: Altera 开发环境下的VGA控制源码，Verilog HDL语言编写，支持sopc环境下操作以及驱动-Altera development environment under the control of VGA source, Verilog HDL language to support the SOPC operating conditions, as well as drive
Platform: | Size: 49152 | Author: | Hits:

[Other] pio_lcd

Description: 控制LCD的工作，是基于SOPC系统的系统程序。LCD的型号是FYD12864。-LCD control work is based on the SOPC system system procedures. LCD models are FYD12864.
Platform: | Size: 3072 | Author: 李聃 | Hits:

[Wavelet] DDS

Description: 利用EDA技术和FPGA在UP3开发板上实现直接数字频率综合器的设计。 实验中加入了相位控制字PWORD，用以控制相位偏移量的前四位，将相位偏移量加到ROM地址总线 上，从而引起从ROM中取得的正弦信号的偏移，实现移相信号发生器的移相功能。 实验中还加入了LCD显示功能，通过LCD显示模块器件，用LCD显示正弦信号的频率，所显示的频 率也是由频率字控制的。LCD的驱动原理同上次实验。-The use of EDA technology and FPGA development in the UP3 board direct digital frequency synthesizer design. Experiment by adding a phase control word PWORD, to control the phase offset of the top four will be added to the phase offset ROM address bus, thereby causing ROM obtained from the sinusoidal signal offset, shifted believe realize its phase-shifting function generator. Experiments have also joined the LCD display, LCD display module through the device, with LCD display the frequency of sinusoidal signal, as shown by the frequency of word frequency control. LCD driving principles with the previous experiment.
Platform: | Size: 1225728 | Author: Emma | Hits:

[Other Embeded program] LCD

Description: Quartus, Sopc Builder搭建的CPU，通过NIOS控制LCD。工程文件。-Quartus, Sopc Builder to build the CPU, through the NIOS control LCD. Engineering documents.
Platform: | Size: 2997248 | Author: 小杨 | Hits:

[VHDL-FPGA-Verilog] lcd

Description: 用sopc技术实现对128*64的lcd液晶显示。这里是它的程序。 -Sopc technology used for implementation of 128* 64 LCD lcd. Here is the procedure.
Platform: | Size: 1024 | Author: zlw | Hits:

[Software Engineering] LCD-Drive-and-control-based-on-NIOSII

Description: 本文介绍了一种基于NIOS II软核处理器实现对LCD-LQ057Q3DC02控制的新方法。在设计中利用FPGA的Altera的SOPC Builder定制NIOS II软核处理器及其与显示功能相关的“软” 硬件模块来协同实现显示控制的软硬件设计。利用SOPC技术，将NIOS II CPU和LCD控制器放在同一片FPGA中，解决了通常情况下必须使用LCD 控制专用芯片才能解决LCD显示的问题。-This article describes an approach based on NIOS II soft-core processors to achieve control of the LCD-LQ057Q3DC02 new method. The use of FPGA in the design of Altera' s SOPC Builder Custom NIOS II soft-core processor and its display-related " soft" hardware modules to achieve synergistic display control hardware and software design. Using SOPC technology, NIOS II CPU and LCD controller on the same FPGA, the solution to the normally must use the LCD control ASIC in order to solve the problem of LCD display.
Platform: | Size: 67584 | Author: shiquan | Hits:

[Software Engineering] SOPC_Nios

Description: Altera SOPC Builder 提供了 Nios Ⅱ处理器及一些常用外设接口 ,但并没有提供 12864 液晶模块的接口及驱动。-Altera SOPC Builder provides the Nios Ⅱ peripheral processor and a number of commonly used interface, but did not provide 12864 LCD module and the drive interface.
Platform: | Size: 356352 | Author: 夏飞 | Hits:

[Other] cycloneIII_3c120_dev_niosII_standard

Description: 该源码是关于FPGA片上系统sopc的nios处理器设计，他实现了led，lcd以及Internet网络各种功能，源码已经测试通过，读者可以使用-The source is on the FPGA chip on the system sopc the nios processor design, he realized the led, lcd, and Internet networking features, source code has been tested, the reader can use
Platform: | Size: 39700480 | Author: 雪晨 | Hits:

[Embeded-SCM Develop] E-Play-SOPC

Description: 1、软件使用 1）软件安装 2）简单设计的完整过程演示 2、FPGA核心板原理及资源介绍 3、E-PLAY扩展板HD7279占用I/O说明 E-PLAY扩展板LCD 128X32 & KEY 8占用I/O说明 4、Quartus II工程应用模块说明 -1, software 1) Software Installation 2) the integrity of the design process simple demo 2, FPGA core plate theory and resources introduced 3, E-PLAY expansion board HD7279 occupied I/O Description E-PLAY expansion board LCD 128X32 & KEY 8 occupation I/O note 4, Quartus II Application Module Description
Platform: | Size: 7530496 | Author: funny | Hits:

[VHDL-FPGA-Verilog] Verilog000

Description: FPGA的学习，熟悉QuartusII软件的各种功能，各种逻辑算法设计，接口模块(RS232,LCD,VGA,SPI,I2c等)的设计，时序分析，硬件优化等，自己开始设计简单的FPGA板子。 ③、NiosII的学习，熟悉NiosII的开发流程，熟悉开发软件(SOPC,NiosII IDE),了解NiosII的基本结构，设计NiosII开发板，编写NiosII C语言程序，调试板子各模块功能。-Verilog语言的学习，熟悉Verilog语言的各种语法。 ②、FPGA的学习，熟悉QuartusII软件的各种功能，各种逻辑算法设计，接口模块(RS232,LCD,VGA,SPI,I2c等)的设计，时序分析，硬件优化等，自己开始设计简单的FPGA板子。 ③、NiosII的学习，熟悉NiosII的开发流程，熟悉开发软件(SOPC,NiosII IDE),了解NiosII的基本结构，设计NiosII开发板，编写NiosII C语言程序，调试板子各模块功能。
Platform: | Size: 22794240 | Author: onejacky | Hits:

[Video Capture] SOPC-VideoFramework

Description: 基于DE2的视频监控，摄像头采集，VGA和LCD显示，图像处理，UC/OS操作系统-DE2-based video surveillance, camera capture, VGA and LCD display, image processing, UC/OS operating system
Platform: | Size: 23900160 | Author: | Hits:

[VHDL-FPGA-Verilog] lcd_at_nios_nii_part

Description: 彩屏液晶在FPGA使用，硬件描述语言写的，速度快-Color LCD used in the FPGA, hardware description language writing speed
Platform: | Size: 14336 | Author: 业永坤 | Hits:

[VHDL-FPGA-Verilog] lcdSync-1v0---Fully-functional-

Description: Quartus II SOPC lcd sync component with avalon streaming sink interface
Platform: | Size: 1024 | Author: adelsmud | Hits:

[VHDL-FPGA-Verilog] SOPC-VideoFramework

Description: Altera SOPC VideoFramework with TRDB-DC2 and TFT-LCD
Platform: | Size: 2392064 | Author: hungjunhao | Hits:

[File Format] SOPC-Nios2-and-LCD-interface

Description: Altera SOPC Builder提供了Nios Ⅱ处理器及一些常用外设接口，但并没有提供 12864液晶模块的接口及驱动。利用SOPC Builder中元件编辑器Create New Component， 通过自定义逻辑的方法在SOPC设计中添加自己开发的液晶显示模块IP核，并集成到系统， 实现了嵌入式NiosⅡ软核处理器与液晶显示模块的接口设计，并编写了驱动程序。可以和 系统自带的接口组件一样，开发者利用该开发组件，不必了解液晶屏原理就可以使用标准C 函数操作组件进行液晶屏显示的独立开发。- Using SOPC Builder Component editor in the Create New Componen to control LCD interface.
Platform: | Size: 211968 | Author: 刘伟 | Hits:

[SCM] LCD

Description: 本实验通过使用 SOPC Builder 搭建一个包含cpu、ram、sdram、pio、lcd定制ip核、jtag _uart”的SOPC系统。 1.通过该系统实现在eclipse的调试串口上显示字符的功能。 2.通过该nios处理器的pio实现流水灯的效果。 3.通过该系统实现在1602液晶上的字符显示。
Platform: | Size: 12288 | Author: 张丽丽 | Hits:

[Windows Develop] myfirst_niosii

Description: 基于sopc的lcd程序，可以实现在lcd上显示两行的字符(LCD program based on SOPC,The two lines of characters can be displayed on the LCD)
Platform: | Size: 12026880 | Author: Eleven真白 | Hits:
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