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[Documents] spartan 3e 中文资料

Description: spartan 3e 中文资料
Platform: | Size: 1904934 | Author: zhoushutian@yeah.net | Hits:

[VHDL-FPGA-Verilog] Xilinx spartan 6 DDR 测试源代码

Description: Xilinx FPGA Spartan 6 上可运行的软核microblaze以及外设DDR, SPI,UART等测试代码
Platform: | Size: 18476664 | Author: jameszhou9019 | Hits:

[VHDL-FPGA-Verilog] spartan II

Description: spartanII 是xilinx公司提供的一款高性能FGPA芯片,本文详细介绍spartanII的体系结构和编程!-spartanII Xilinx is provided by a high-performance chip FGPA, spartanII This paper describes the architecture and programming!
Platform: | Size: 328704 | Author: 唐健隆 | Hits:

[ARM-PowerPC-ColdFire-MIPS] Spartan3EHDL

Description: xlinix 公司的 SPARTAN-3 片子 Spartan-3E HDL 设计库指南 本人正在使用 如果需要其他信息的 可以和我联系-xlinix the SPARTAN-3 film Spartan-3E HDL design library guidelines are in use if I need other information can contact me and
Platform: | Size: 757760 | Author: 宫城 | Hits:

[Other] taxiwork

Description: 介绍了基于FPGA的多功能计程车计价器的电路设计。该设计采用了可编程逻辑器件FPGA的ASIC设计，并基于超高速硬件描述语言VHDL在Xilinx公司的SpartanⅡ系列的2sc200PQ208-5芯片上编程实现了整个系统的控制部分，整个自动控制系统由四个模块构成：秒分频模块、控制模块、计量模块和译码显示模块。该设计不仅仅实现了显示计程车计费的功能，其多功能表现在它可以通过选择键选择显示计程车累计走的总路程和乘客乘载的时间。计时、计程、计费准确可靠，应用于实际当中有较好的实用价值和较高的可行性。-introduced FPGA-based multifunctional taxi meter circuit design. The design using programmable logic device FPGA ASIC design, and for the super-high-speed VHDL hardware description language in the company Xilinx Spartan II Series 2 sc 200PQ208-5 chip programming of the control system as a whole, Automatic control the entire system from four modules : a seconds-frequency module, control module, metrology modules and decoding module. The design not only achieved a taxi showed Billing functions, Multifunctional its performance through its keypad revealed taxi taking the cumulative total journey of the passengers took the set time. Program, log, billing is accurate, reliable and practical application of them have good practical value and the higher the possibility.
Platform: | Size: 9216 | Author: 柑佬 | Hits:

[VHDL-FPGA-Verilog] System09

Description: BurchED B5-X300 Spartan2e using XC2S300e device Top level file for 6809 compatible system on a chip Designed with Xilinx XC2S300e Spartan 2+ FPGA. Implemented With BurchED B5-X300 FPGA board, B5-SRAM module, B5-CF module and B5-FPGA-CPU-IO module-BurchED B5- X300 Spartan2e using XC2S300e Top level device file for 6809 compatible syste m on a chip Designed with Xilinx XC2S300e Sparta n 2 FPGA. Implemented With BurchED B5- X300 FPGA board, B5-SRAM module, B5-CF module and B5- FPGA-CPU-IO module
Platform: | Size: 610304 | Author: 陈朋 | Hits:

[VHDL-FPGA-Verilog] ledleft

Description: xilinx的SPARTAN-3E入门开发板实例 根据官方公布的led移动范例改写。 原范例仅提供了源代码、烧写文件以及dos窗口下使用的烧写bat文件。 本实例采用了ise7.1i创建，在ise下重建整个工程，有助于初学者理解使用。-xilinx the SPARTAN-3E portal development board examples According to the official announcement led to the mobile Examples rewritten. Original examples provided only source code, dos burning documents and the use of the window of burning bat documents. The examples used ise7.1i creation, the redevelopment of the entire ise project will help beginners understand the use.
Platform: | Size: 393216 | Author: 韩兆伟 | Hits:

[Embeded-SCM Develop] 8051forxilinx

Description: 我在spartan-3e starter kit 的板上实现了mc8051，程序调试通过，运行正常。 方法 1、用Keil 编译8051的代码； 2、将生成的hex文件用hex->bin工具转成bin文件 3、用bin－>coe工具转成coe 4、在core generate 生成的rom中指明coe文件的位置 5、编译、下载到spartan-3e starter kit 板上，你将会看到流水灯的效果 我正在做这方面的东西，欢迎大家与我一起探讨。-I spartan- 3e of the starter kit board realized mc8051. through debugging procedures, operating normally. A method of using the Keil compiler code 8051; 2, will produce the documents hex hex-
Platform: | Size: 608256 | Author: lanty | Hits:

[VHDL-FPGA-Verilog] Freq_counter

Description: 本代码介绍了使用VHDL开发FPGA的一般流程，最终采用了一种基于FPGA的数字频率的实现方法。该设计采用硬件描述语言VHDL，在软件开发平台ISE上完成，可以在较高速时钟频率（100MHz）下正常工作。该设计的频率计能准确的测量频率在1Hz到100MHz之间的信号。使用ModelSim仿真软件对VHDL程序做了仿真，并完成了综合布局布线，最终下载到芯片Spartan-II上取得良好测试效果。-the code on the FPGA using VHDL development of the general process, finally adopted a FPGA-based digital frequency method. The design using VHDL hardware description language, the software development platform ISE completed, the higher speed clock frequency (100MHz) under normal work. The design of the frequency meter can be accurately measured in a frequency of 100MHz between Hz signal. Use ModelSim VHDL simulation software to do the simulation process, and completed a comprehensive layout cabling, downloaded to the final chip Spartan-II made good on the test results.
Platform: | Size: 515072 | Author: 许的开 | Hits:

[VHDL-FPGA-Verilog] S3Demo

Description: Spartan 3 Digilent Demo:This demo drives the perphrials on the Spartan 3 board. This drives a simple pattern to the VGA port, connects the switches to the LEDs, buttons to each anode of the seven segment decoder. The seven segment decoder has a simple counter running on it, and when SW0 is in the up position the seven segment decoder will display scan codes from the PS2 port. This demo how ever does not drive the RS-232 port or the memory. This is a simple design done entirely VHDL not microblaze.
Platform: | Size: 731136 | Author: Roy Hsu | Hits:

[VHDL-FPGA-Verilog] xapp485

Description: XAPP485 - 以高达 666 Mbps 的速率在 Spartan-3E FPGA 中实现 1：7 的解串行化-XAPP485- to as high as the rate of 666 Mbps in the Spartan-3E FPGA to achieve the solution of 1:7 serialization
Platform: | Size: 2361344 | Author: mickwolf | Hits:

[Software Engineering] SPARTAN-3E

Description: SPARTAN-3E的说明文档,详解的描述了SPARTAN-3E的使用方法-SPARTAN-3E description of documents, detailed description of the SPARTAN-3E use
Platform: | Size: 7226368 | Author: 富聪 | Hits:

[VHDL-FPGA-Verilog] Spartan-3E

Description: Spartan-3E 中文介绍（包括图解、功能介绍、使用方法、锁管脚等）-Spartan-3E Starter Kit Board User Guide
Platform: | Size: 9464832 | Author: weishangqing | Hits:

[VHDL-FPGA-Verilog] Spartan-3_NeuralNetwork_3-layer_feedforward_backp

Description: The aim of this project is the design and implementation of a system simulating a NN in the Spartan-3 Starter Board of Xilinx. The NN will be a 3-layer feedforward backpropagation.- The aim of this project is the design and implementation of a system simulating a NN in the Spartan-3 Starter Board of Xilinx. The NN will be a 3-layer feedforward backpropagation.
Platform: | Size: 1479680 | Author: duzos | Hits:

[VHDL-FPGA-Verilog] spartan-3E

Description: xilinx公司的FPGA的spartan-3E系列套片参数手册-xilinx the company' s FPGA-spartan-3E series of set piece argument Handbook
Platform: | Size: 2729984 | Author: symbolics | Hits:

[VHDL-FPGA-Verilog] Spartan-3E-user-guide

Description: spartan 3e实验板较详细的介绍，包括整体介绍，功能分析和外设等-spartan 3e experiment board described in detail, including the overall introduction, functional analysis and peripherals
Platform: | Size: 4536320 | Author: 刘学 | Hits:

[VHDL-FPGA-Verilog] Spartan-3ADSPs

Description: The objective of the labs today is to give you a basic understanding of FPGA design and enough experience to begin your own FPGA design with the ISE 10.1 tools and the Xilinx Spartan-3A DSP 1800A Starter Kit.-The objective of the labs today is to give you a basic understanding of FPGA design and enough experience to begin your own FPGA design with the ISE 10.1 tools and the Xilinx Spartan-3A DSP 1800A Starter Kit.
Platform: | Size: 1040384 | Author: Gopi | Hits:

[VHDL-FPGA-Verilog] Clocking-resources-Spartan-6

Description: CLOCK RESOURCES FOR SPARTAN 6 LX150T.
Platform: | Size: 1660928 | Author: asilar | Hits:

[VHDL-FPGA-Verilog] Spartan-3E--mac

Description: Spartan 3E开发板中实现以太网通讯-Spartan 3E development board Ethernet communications
Platform: | Size: 1349632 | Author: 柳园 | Hits:

[VHDL-FPGA-Verilog] ug331 Spartan-3 系列 FPGA 中文用户指南

Description: 官方手册ug331的中文版 本用户指南为客户使用 Spartan?-3 FPGA 系列各平台 （Spartan-3、Spartan-3E、 Spartan-3A、Spartan-3AN 和 Spartan-3A DSP FPGA 平台）的架构功能提供指导。本文 综合了各平台的技术文档，以便于了解其中异同，同时减少多种资料来源的内容重复。这些平台是新设计的补充解决方案。(ug331 Spartan-3 Generation FPGA User Guide)
Platform: | Size: 6210560 | Author: xtp1230 | Hits:
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