Search - spi VHDL

[MPI] SPI-PRT

Description: 昨天在论坛上看到有人帖出了他写的并串转换VHDL代码，但是他自己说有问题，但是不知道怎么改。我大概看了一下，发现思路还是比较乱的。于是就写下了我自己的并串转换代码。-yesterday at the forum see someone points out his writing and string conversion VHDL code, But he said there are problems, but does not know how reform. I probably watched and found ideas is quite a mess. So I wrote on their own code and string conversion.
Platform: | Size: 1024 | Author: ZHAOBOO | Hits:

[VHDL-FPGA-Verilog] CUS_SPI-VHDL

Description: 此为VHDL的SPI通信代码，全部在一个压缩包中，请仔细阅读后再使用．-this as VHDL code SPI communication, all in a compressed package, please read carefully before use.
Platform: | Size: 4096 | Author: 藏瑞 | Hits:

[VHDL-FPGA-Verilog] SPI

Description: SPI BUS VHDL实现-VHDL SPI BUS
Platform: | Size: 852992 | Author: davidluo | Hits:

[Other] spi

Description: VHDL 实现的SPI接口，在Altera EMP7128 上应用过-VHDL SPI interface, the application of Altera EMP off
Platform: | Size: 1024 | Author: 陈同 | Hits:

[VHDL-FPGA-Verilog] spi

Description: VHDL实现SPI功能源代码 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register between the "master" and the "slave". Typically both the -- master and slave have an 8 bit shift register so the combined -- register is 16 bits. When an SPI transfer takes place, the master and -- slave shift their shift registers 8 bits and thus exchange their 8 -- bit register values.-SPI realize the functional VHDL source code The SPI bus is a 3 wire bus that in effect links a serial shift register between the
Platform: | Size: 65536 | Author: 阿飞 | Hits:

[VHDL-FPGA-Verilog] spi

Description: SPI总线，VHDL语言，硬件描述语言源码-SPI bus, VHDL language, hardware description language source code
Platform: | Size: 3072 | Author: 郑文棋 | Hits:

[VHDL-FPGA-Verilog] spi.tar

Description: SPI(serial port interface)的Verilog/VHDL源代碼，已模擬並驗證。-SPI (serial port interface) of the Verilog/VHDL source code, has been simulated and verified.
Platform: | Size: 116736 | Author: hcjian | Hits:

[SCM] SPI

Description: // This program accesses a SPI EEPROM using polled mode access. The F06x MCU // is configured in 4-wire Single Master Mode, and the EEPROM is the only // slave device connected to the SPI bus. The read/write operations are // tailored to access a Microchip 4 kB EEPROM 25LC320. The relevant hardware // connections of the F06x MCU are shown here:
Platform: | Size: 72704 | Author: 蓝天 | Hits:

[VHDL-FPGA-Verilog] spi

Description: spi协议的FPGA实现(Verlog).-spi protocol FPGA realize (Verlog).
Platform: | Size: 1024 | Author: 徐凯 | Hits:

[VHDL-FPGA-Verilog] spi

Description: 用vhdl编写的spi接口程序，在epm7128上仿真成功。-VHDL prepared using spi interface program, in the simulation epm7128 success.
Platform: | Size: 1024 | Author: 邓立新 | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: VHDL程序集锦，很多有用程序，英文版其中有汉明码编译码，优先译码等等。-VHDL Collection procedures, many useful procedures, the English version of them hamming code encoding and decoding, the priority decoder and so on.
Platform: | Size: 168960 | Author: 萍果 | Hits:

[Embeded-SCM Develop] sd+spi

Description: sd 的spi模式详细的中文资料，一位好心人翻译的-sd of the spi mode in detail the information the Chinese, a translation of well-wishers
Platform: | Size: 1821696 | Author: 黄天乐 | Hits:

[VHDL-FPGA-Verilog] spi

Description: 一篇比较好的spi接口的vhdl实现的参考-A relatively good spi interface realize VHDL reference
Platform: | Size: 18432 | Author: 杨子树 | Hits:

[VHDL-FPGA-Verilog] SPI

Description: SPI经典ip核可以直接用于工程的开发和利用-err
Platform: | Size: 49152 | Author: 毋杰 | Hits:

[Embeded-SCM Develop] SPI

Description: spi slave model spi slave model
Platform: | Size: 1024 | Author: jason | Hits:

[VHDL-FPGA-Verilog] VHDL-SPI-Module.doc

Description: 本spi参数化通讯模块是一个支持SPI串行通信协议从协议的SPI从接口。可通过改变参数设置传输的位数，由外部控制器给定脉冲控制传输。-The parameters of spi communication module is a support SPI serial communication protocol from the agreement from the SPI interface. By changing the parameter settings can be transmitted over the median, given by an external controller to control transmission pulse.
Platform: | Size: 37888 | Author: | Hits:

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[MPI] SPI-PRT

[VHDL-FPGA-Verilog] CUS_SPI-VHDL

[VHDL-FPGA-Verilog] SPI

[Other] spi

[VHDL-FPGA-Verilog] spi

[VHDL-FPGA-Verilog] spi

[VHDL-FPGA-Verilog] spi.tar

[SCM] SPI

[VHDL-FPGA-Verilog] spi

[VHDL-FPGA-Verilog] spi

[VHDL-FPGA-Verilog] VHDL

[Embeded-SCM Develop] sd+spi

[VHDL-FPGA-Verilog] spi

[VHDL-FPGA-Verilog] SPI

[Embeded-SCM Develop] SPI

[VHDL-FPGA-Verilog] VHDL-SPI-Module.doc

[VHDL-FPGA-Verilog] SPI

[VHDL-FPGA-Verilog] spi

[VHDL-FPGA-Verilog] SPI-Collect

[VHDL-FPGA-Verilog] spi-vhdl

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