Description: VHDL实现SPI功能源代码
-- The SPI bus is a 3 wire bus that in effect links a serial shift
-- register between the "master" and the "slave". Typically both the
-- master and slave have an 8 bit shift register so the combined
-- register is 16 bits. When an SPI transfer takes place, the master and
-- slave shift their shift registers 8 bits and thus exchange their 8
-- bit register values.-SPI realize the functional VHDL source code The SPI bus is a 3 wire bus that in effect links a serial shift register between the Platform: |
Size: 65536 |
Author:阿飞 |
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Description: STM32 SPI口的应用例程，可是设置成主模式或者从模式。-STM32 SPI routine application of the mouth, but set to master mode or slave mode. Platform: |
Size: 49152 |
Author:王义 |
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Description: 新华龙单片机SPI通信代码经过测试，保证能用，包括SPI存储器读写，主从模式通信-New single-chip SPI communication code hualong tested to ensure the use, including memory read and write SPI, master-slave mode of communication Platform: |
Size: 12288 |
Author:冯永刚 |
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Description: SPI通讯协议的实现，
主从模式的通讯，所有通讯必须主机发起-SPI communication protocol' s implementation, master-slave mode of communication, all communication must be initiated by the host Platform: |
Size: 1024 |
Author:石头 |
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Description: This is a verilog code used oversampled
clock to implement SPI slave. Also include C code for a ARM processor
as the SPI master-This is a verilog code used oversampled
clock to implement SPI slave Platform: |
Size: 1024 |
Author:johnl |
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Description: 这是MC9S12DG128单片机SPI通讯模块开发实例,该实例包含SPI主从机的全部源代码,可实现双机通讯。-This is the MC9S12DG128 MCU SPI communication module development instance of SPI master and slave machines with all the source code, enabling two-machine communication. Platform: |
Size: 548864 |
Author:Boolean |
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Description: SPI主从通信，MSP430F149从机,C8051F020主机。从机接收主机数据并在OLED液晶上显示。C8051F020开发环境为KEIL，MSP430F149为IAR。-SPI master-slave communication, MSP430F149 slave, C8051F020 host. From the host machine to receive data and OLED LCD display. C8051F020 development environment for the KEIL, MSP430F149 as the IAR. Platform: |
Size: 59392 |
Author:黄宏钦 |
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Description: spi通讯实验，主从模式，中断收发，主机发1234，从机发5678，主机从机收发均采用中断， 编译环境iccavr，带proteus仿真-spi communication experiment, master-slave mode, interrupt delivery, the host issued 1234, issued 5678 from the machine, the host slave transceivers are used interrupted build environment iccavr, with proteus simulation Platform: |
Size: 32768 |
Author:lichunzhu |
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Description: The Serial Peripheral Interface Bus or SPI bus is a synchronous serial data link standard named by Motorola that operates in full duplex mode. Devices communicate in master/slave mode where the master device initiates the data frame. Multiple slave devices are allowed with individual slave select (chip select) lines. Sometimes SPI is called a "four wire" serial bus, contrasting with three, two, and one wire serial buses.-The Serial Peripheral Interface Bus or SPI bus is a synchronous serial data link standard named by Motorola that operates in full duplex mode. Devices communicate in master/slave mode where the master device initiates the data frame. Multiple slave devices are allowed with individual slave select (chip select) lines. Sometimes SPI is called a "four wire" serial bus, contrasting with three, two, and one wire serial buses.
Platform: |
Size: 478208 |
Author:wei |
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Description: The VSPI core implements an SPI interface compatible with the many
-- serial EEPROMs, and microcontrollers. The VSPI core is typically used
-- as an SPI master, but it can be configured as an SPI slave as well.
Platform: |
Size: 226304 |
Author:aaa |
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Description: SPI的通信原理很简单，它以主从方式工作，这种模式通常有一个主设备和一个或多个从设备，需要至少4根线，事实上3根也可以（单向传输时）。也是所有基于SPI的设备共有的，它们是SDI（数据输入），SDO（数据输出），SCK（时钟），CS（片选）。
-SPI communication principle is very simple, it is the work of master-slave mode, this mode usually has a master device and one or more from the device, requires at least four lines, in fact, 3 can also be (one-way transmission). SPI-based devices are all common, they are SDI (data entry), SDO (data output), SCK (clock), CS (chip select). Platform: |
Size: 114688 |
Author:pengjun |
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Description: AVR mega16 spi主从通信之主机部分【完整工程，内涵.c\.h\.hex】-AVR mega16 spi master-slave communication of the host part of the [complete engineering, content. C \. H \. Hex] Platform: |
Size: 37888 |
Author:sqwowow |
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Description: 基于STM32的双机全双工SPI主从通信程序，包括主机程序和从机程序。(STM32 dual full duplex SPI master-slave communication based program, including the host program and the program from the machine.) Platform: |
Size: 6225920 |
Author:hanjianchao001
|
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