Description: SPI(serial port interface)的Verilog/VHDL源代碼,已模擬並驗證。-SPI (serial port interface) of the Verilog/VHDL source code, has been simulated and verified. Platform: |
Size: 116736 |
Author:hcjian |
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Description: spi总线控制器,包含vhdl和verilog两种代码方式来实现。-spi bus controller, including VHDL and Verilog code in two ways to achieve. Platform: |
Size: 13312 |
Author:wangdong |
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Description: DSP学习板上的例子程序包括
AD转换 CAN总线 SPI SCI -Examples of on-board DSP learning process includes the AD conversion CAN Bus SPI SCI Platform: |
Size: 1227776 |
Author:qwe |
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Description: This is a verilog code used oversampled
clock to implement SPI slave. Also include C code for a ARM processor
as the SPI master-This is a verilog code used oversampled
clock to implement SPI slave Platform: |
Size: 1024 |
Author:johnl |
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Description: This a verilog code for SPI Master testbench is also provided
spi_top.v
Xilinx ISE or Icarus verilog to compile and simulate-This is a verilog code for SPI Master testbench is also provided
spi_top.v
Xilinx ISE or Icarus verilog to compile and simulate Platform: |
Size: 9216 |
Author:RutaliMulye |
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Description: iic协议和SPI的verilog代码,主要根据两个协议来传输数据,其中代码有自己写的和借鉴他人修改的,已验证-The iic protocol and SPI verilog code control iic data transmission, and write your own and learn from others to modify Verified Platform: |
Size: 15360 |
Author:汤欲涛 |
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Description: 非常好用的spi veilog代码,适合学习,里面的注释及讲解非常精准-Very easy to use spi veilog code, for learning, inside and on the very accurate comments Platform: |
Size: 7168 |
Author:田勇 |
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