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[VHDL-FPGA-VerilogIP_SPI

Description: spi总线的vhdl代码,试了试可以用。希望能对开发者有所帮助。-spi bus vhdl code Shileshi can use. The hope is to help developers.
Platform: | Size: 344064 | Author: 李鸣 | Hits:

[Otherspi

Description: VHDL 实现的SPI接口,在Altera EMP7128 上应用过-VHDL SPI interface, the application of Altera EMP off
Platform: | Size: 1024 | Author: 陈同 | Hits:

[VHDL-FPGA-Verilogspi

Description: VHDL实现SPI功能源代码 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register between the "master" and the "slave". Typically both the -- master and slave have an 8 bit shift register so the combined -- register is 16 bits. When an SPI transfer takes place, the master and -- slave shift their shift registers 8 bits and thus exchange their 8 -- bit register values.-SPI realize the functional VHDL source code The SPI bus is a 3 wire bus that in effect links a serial shift register between the
Platform: | Size: 65536 | Author: 阿飞 | Hits:

[Embeded-SCM Developvspi_VHDL

Description: FPGA/CPLD VHDL语言实现SPI,拥有两种模式,FPGA/CPLD即可工作在主机模式,又可工作在从机模式 -FPGA/CPLD VHDL language SPI, have the two models, FPGA/CPLD can work in host mode, but also work in slave mode
Platform: | Size: 248832 | Author: 张焱 | Hits:

[VHDL-FPGA-Verilogspi_op_core

Description: 串行数据SPI master的开源控制器,verilog,内附说明-SPI master serial data open-source controller, verilog, containing a description
Platform: | Size: 81920 | Author: 王天 | Hits:

[VHDL-FPGA-Verilogspi

Description: 用vhdl编写的spi接口程序,在epm7128上仿真成功。-VHDL prepared using spi interface program, in the simulation epm7128 success.
Platform: | Size: 1024 | Author: 邓立新 | Hits:

[VHDL-FPGA-VerilogSPI_collect

Description: 有关SPI的vhdl实现。包括SPI官方协议,几篇开发时用到的论文,附加了中文注释的SPI IPcore,还有一个经过简化的master mode的SPI实现的vhdl代码-Related to the VHDL SPI realize. Including SPI official agreement, when used to develop several theses, Chinese notes attached SPI IPcore, there is a simplified master mode the SPI realize the VHDL code
Platform: | Size: 1334272 | Author: danielmu | Hits:

[VHDL-FPGA-Verilog11

Description:
Platform: | Size: 339968 | Author: jiaojiao | Hits:

[VHDL-FPGA-VerilogSPI

Description: SPI经典ip核 可以直接用于工程的开发和利用-err
Platform: | Size: 49152 | Author: 毋杰 | Hits:

[VHDL-FPGA-Verilogspi_vhdl_source

Description: SPI的VHDL程序,经过quartus验证的,不错!-SPI of the VHDL program, after verification quartus, yes!
Platform: | Size: 671744 | Author: 王头 | Hits:

[VHDL-FPGA-Verilogsinc3filter

Description: 实现sinc3 FILTER的VHDL源码,还有实现SPI通讯的。-Sinc3 FILTER to achieve the VHDL source code, as well as the realization of SPI communication.
Platform: | Size: 5120 | Author: 李天鸿 | Hits:

[VHDL-FPGA-Verilogspi_master_control

Description: VHDL SPI 控制器FPGA官网提供-VHDL SPI controller FPGA to provide official website
Platform: | Size: 670720 | Author: lonely_vv | Hits:

[Embeded-SCM Developspi

Description: 此程序是一个完整的项目工程,包括c-c++程序和VHDL程序 -This procedure is a complete project, including the c-c++ program and VHDL procedures
Platform: | Size: 17528832 | Author: pxlj | Hits:

[VHDL-FPGA-Verilogspi_write

Description: 对spi接口的flash操作,用VHDL语言实现,read,write,擦除的接口电路控制-Spi interface on the flash operation, with the VHDL language, read, write, erase controls the interface circuit
Platform: | Size: 1024 | Author: 王伯祥 | Hits:

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