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[VHDL-FPGA-Verilog] SDmmcfpgaconfig.tar

Description: MMC卡的VHDL源代码实现，经过大批量生产验证-MMC card VHDL source code to achieve, through large-scale production test
Platform: | Size: 5120 | Author: 喻袁洲 | Hits:

[VHDL-FPGA-Verilog] spi

Description: VHDL实现SPI功能源代码 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register between the "master" and the "slave". Typically both the -- master and slave have an 8 bit shift register so the combined -- register is 16 bits. When an SPI transfer takes place, the master and -- slave shift their shift registers 8 bits and thus exchange their 8 -- bit register values.-SPI realize the functional VHDL source code The SPI bus is a 3 wire bus that in effect links a serial shift register between the
Platform: | Size: 65536 | Author: 阿飞 | Hits:

[VHDL-FPGA-Verilog] spi

Description: SPI总线，VHDL语言，硬件描述语言源码-SPI bus, VHDL language, hardware description language source code
Platform: | Size: 3072 | Author: 郑文棋 | Hits:

[VHDL-FPGA-Verilog] spi.tar

Description: SPI(serial port interface)的Verilog/VHDL源代碼，已模擬並驗證。-SPI (serial port interface) of the Verilog/VHDL source code, has been simulated and verified.
Platform: | Size: 116736 | Author: hcjian | Hits:

[VHDL-FPGA-Verilog] an487_design_example

Description: 用verlog hdl开发的SPI 的源码-Verlog hdl use the source code developed by SPI
Platform: | Size: 603136 | Author: zhiqiang | Hits:

[Compress-Decompress algrithms] masterspiverilog

Description: spi总线控制器的fpga实现 verilog源代码及测试-spi bus controller realize the FPGA Verilog source code and test
Platform: | Size: 180224 | Author: sang | Hits:

[VHDL-FPGA-Verilog] an486_design_example

Description: VHDL实现SPI接口转I2c接口的源代码，可以直接调用-VHDL realize I2C interface SPI interface to the source code, you can directly call
Platform: | Size: 370688 | Author: zw | Hits:

[JSP] spi3-aciklamali

Description: vhdl-spi module interface helpful source code
Platform: | Size: 6144 | Author: Onur | Hits:

[Embeded-SCM Develop] spicore

Description: 基于FPGA的SPI控制器.doc,包括FPGA实现地源代码和协议的基本介绍--FPGA-based SPI controller. Doc, including the FPGA to achieve an agreement to source code and a basic introduction
Platform: | Size: 7168 | Author: ss | Hits:

[VHDL-FPGA-Verilog] 43680540SPI_Core

Description: Verilog for SPI Core source code
Platform: | Size: 14336 | Author: J.M Yang | Hits:

[VHDL-FPGA-Verilog] sinc3filter

Description: 实现sinc3 FILTER的VHDL源码，还有实现SPI通讯的。-Sinc3 FILTER to achieve the VHDL source code, as well as the realization of SPI communication.
Platform: | Size: 5120 | Author: 李天鸿 | Hits:

[Other] spi_slave

Description: SPI slave source code
Platform: | Size: 351232 | Author: Chris | Hits:

[Embeded-SCM Develop] baudgen_latest.tar

Description: 波特率发生器的VHDL源码。适用于uart、spi、IIC-Baud rate generator VHDL source code. Apply to uart, spi, IIC
Platform: | Size: 427008 | Author: pyu | Hits:

[VHDL-FPGA-Verilog] Nios_II_SPI

Description: 本源码为Nios II的开发示例,主要演示Nios II的SPI总线设计。开发环境QuartusII。 本示例十分经典，对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of an example, the main demonstration Nios II design of the SPI bus. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.
Platform: | Size: 16035840 | Author: huangshengqun | Hits:

[Other] spi_tx

Description: 关于串口通讯(SPI)的VHDL源程序,可以在通用串口通讯中-On the serial communication (SPI) of the VHDL source code, can be general-purpose serial communication
Platform: | Size: 1024 | Author: mxc | Hits:

[VHDL-FPGA-Verilog] SPI_controller

Description: SPI serial flash ROM的verilog源代码, 针对winbond W25x16,已经经过逻辑验证,并实际用在芯片设计中,作为一个模块,正常工作.-SPI serial flash ROM in verilog source code for winbond W25x16, logic has been verified, and actually used in chip design, as a module to work.
Platform: | Size: 8192 | Author: Jerd Hu | Hits:

[VHDL-FPGA-Verilog] SPI

Description: SPI总线通信模块，经测试验证通过的源码-SPI vhdl source code
Platform: | Size: 329728 | Author: victor | Hits:

[VHDL-FPGA-Verilog] SPI_interface(VHDL)

Description: SPI接口模块源代码（VHDL）语言，经过产品应用测试。-SPI interface module source code (VHDL language), after product application testing.
Platform: | Size: 1024 | Author: Field | Hits:

[VHDL-FPGA-Verilog] CoreSPI_21_eval

Description: SPI IP核源码，包括Verilog和VHDL两种语言源码-SPI IP core source code, including the two languages ​ ​ Verilog and VHDL source code
Platform: | Size: 628736 | Author: 任林枫 | Hits:

[VHDL-FPGA-Verilog] spi_vhdl

Description: vhdl实现spi可以同有SPI接口的器件进行通信对SPI接口器件的读写控制vhdl源程序，fpga cpld-vhdl spi can achieve devices with a SPI interface to communicate with devices on the SPI interface to read and write vhdl source code control
Platform: | Size: 6144 | Author: 站长 | Hits:
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