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[Other resource] sqrt

Description: verilog 硬件平方根算法 采用与笔算平方根一样的算法
Platform: | Size: 17808 | Author: lizhizhou | Hits:

[VHDL-FPGA-Verilog] sqrt

Description: verilog 硬件平方根算法 采用与笔算平方根一样的算法-Verilog hardware and written calculation algorithm uses the square root of the square root of the same algorithm
Platform: | Size: 17408 | Author: lizhizhou | Hits:

[VHDL-FPGA-Verilog] sqrt

Description: This zip file contains the verilog source code for square root calculation and its test bench
Platform: | Size: 2048 | Author: Jaganathan | Hits:

[VHDL-FPGA-Verilog] sqrt

Description: 树式除法型开方器VERILOG实现,用于任意长度的无符号数的开方运算-Square root of the tree-type divider-type device to achieve VERILOG
Platform: | Size: 1024 | Author: 神气 | Hits:

[VHDL-FPGA-Verilog] sqrt32

Description: verilog源代码，用于开根号计算（32位）-sqrt32.v sqrt of 32-bit integer, Verilog source
Platform: | Size: 4096 | Author: 杨明 | Hits:

[VHDL-FPGA-Verilog] Kaifang

Description: 利用ISE编写的实现开方功能的verilog程序，利用了CORDICIP核，可以完成开方功能-Prepared using ISE verilog program to achieve prescribing functions, using the CORDICIP nuclear, prescribing functions to be completed
Platform: | Size: 421888 | Author: 蜡笔 | Hits:

[VHDL-FPGA-Verilog] 470P2F07

Description: sqrt root using verilog
Platform: | Size: 129024 | Author: saluish | Hits:

[VHDL-FPGA-Verilog] sqrt_Verilog

Description: Verilog实现开平方模块，内含有具体的算法描述Word文档，简单清晰明了。-sqrt with Verilog HDL. It is useful.
Platform: | Size: 17408 | Author: 张重 | Hits:

[VHDL-FPGA-Verilog] SQRT

Description: 用verilog代码编写的求整数平方根的FPGA工程。-Verilog code written request with the integer square root of the FPGA project.
Platform: | Size: 237568 | Author: 袁媛 | Hits:

[VHDL-FPGA-Verilog] sqrt

Description: 用verilog语言实现二进制数开方运算-verilog sqrt
Platform: | Size: 1629184 | Author: 周慧 | Hits:

[VHDL-FPGA-Verilog] sqrt

Description: VERILOG描述的开平方模块核，开方运算是FPGA或ASIC设计中所需要的核心运算模块。-VERILOG description of open square modules nuclear root operation is the core computing module FPGA or ASIC design.
Platform: | Size: 1024 | Author: Solomon | Hits:

[VHDL-FPGA-Verilog] sqrt

Description: 用verilog实现的开2次方，已经在modelism中经过验证，其时间周期不固定。-Implementation open square with verilog.
Platform: | Size: 1024 | Author: yangyang | Hits:

[VHDL-FPGA-Verilog] Fast_SQRT

Description: 只使用简单的移位操作对32bit整型数进行开方的算法的Verilog实现-realize the sqrt algorithm which only use shift operation on 32bit int by Verilog
Platform: | Size: 5208064 | Author: WangYibin | Hits:

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