Search - square VHDL

[Other resource] vhdl平方根

Description: 计算某数的平方根，VHDL语言，使用简单-calculate the square root of a number, VHDL, use simple
Platform: | Size: 40483 | Author: wl | Hits:

Description: 课程设计要求设计并用FPGA实现一个数字频率计，具体设计要求如下：测量频率范围： 10Hz～100KHz 精度： ΔF / F ≤ ±2 % 系统外部时钟： 1024Hz 测量波形：方波 Vp-p ＝ 3～5 V 硬件设备：Altera Flex10K10 五位数码管 LED发光二极管编程语言：Verilog HDL / VHDL-curriculum design and FPGA design to achieve a digital frequency meter, the specific design requirements are as follows : measurement frequency range : 10Hz to 100KHz precision : F/F 2% external clock system : 1024Hz Waveform Measurement : square Vp-p = 3 ~ 5 V hardware : Altera Flex10K10 five digital LED light emitting diode programming languages : Verilog HDL/VHDL
Platform: | Size: 144384 | Author: 兰 | Hits:

[VHDL-FPGA-Verilog] vhdl平方根

Description: 计算某数的平方根，VHDL语言，使用简单-calculate the square root of a number, VHDL, use simple
Platform: | Size: 39936 | Author: wl | Hits:

[VHDL-FPGA-Verilog] ddfs

Description: 我自己用vhdl实现编的dds，能实现正弦波，方波，三角波。-my own use VHDL to achieve series dds, able sine, square, triangle wave.
Platform: | Size: 87040 | Author: 黎明 | Hits:

[VHDL-FPGA-Verilog] wave_genarator_vhdl

Description: vhdl波形发生程序.实现4种常见波形正弦、三角、锯齿、方波（A、B）的频率、幅度可控输出（方波 A的占空比也是可控的），可以存储任意波形特征数据并能重现该波形，还可完成各种波形的线形叠加输出。 -vhdl waveform occurred procedures. 4 achieve common sinusoidal waveform, 1.30, sawtooth, square-wave (A, B) the frequency and amplitude control output (square A duty cycle is also controllable), can store data of arbitrary waveform characteristics and able to reproduce the waveform, but also through a variety of linear superposition of the waveform output.
Platform: | Size: 10240 | Author: 江汉 | Hits:

[VHDL-FPGA-Verilog] arith_lib_cadence

Description: Cadence的VHDL运算库包，实现求方根，平方你是不是以前不知道怎么弄．哈哈．-Cadence VHDL Operational the package, seeking to achieve root, You are not square did not know how get. Ha ha.
Platform: | Size: 81920 | Author: 喻袁洲 | Hits:

[Algorithm] 2006-9-21PanWeicaiDDS

Description: 这是一个DDS程序,用VHDL编写,实现的是一个频率可调的方波-This is a DDS procedures, using VHDL prepared achieve is a frequency adjustable square
Platform: | Size: 99328 | Author: dfefe | Hits:

[VHDL-FPGA-Verilog] vhdl_buzzer

Description: 蜂鸣器实验向蜂鸣器发送一定频率的方波可以使蜂鸣器发出相应的音调，该实验通过设计一个状态机和分频器使蜂鸣器发出“多来咪发梭拉西多”的音调。-buzzer to buzzer this experiment certain frequency square wave can buzzer sounded a corresponding pitch. The experiment by designing a state machine and the buzzer sounded a divider so that the "multi-microphone to the shuttle Rasi more" tone.
Platform: | Size: 217088 | Author: 赵海东 | Hits:

[VHDL-FPGA-Verilog] DDS234

Description: 文中给出了用VHDL实现三角波正弦波方波的代码, 可以在maxPLUX2上运行,-In this paper, using the VHDL-wave sine wave square wave triangle realize the code, you can run maxPLUX2,
Platform: | Size: 2048 | Author: qibinchuan | Hits:

[VHDL-FPGA-Verilog] box

Description: 用vhdl语言编写的基于fpga的波形发生器，使用了quartusII程序。可以在1602液晶显示器上显示目前的波形种类。产生的波形分别是正弦波，三角波，锯齿波和方波。-VHDL language using FPGA-based waveform generator, using the procedures quartusII. 1602 liquid crystal display can show the current waveform types. Generated waveforms are sine wave, triangle wave, sawtooth and square wave.
Platform: | Size: 1708032 | Author: zhg | Hits:

[SCM] wave-generator

Description: 产生方波，三角波，正弦波，余弦波等波形，并且可以自由选择和切换，最后可以用于波形输出-Have a square wave, triangle wave, sine wave, cosine wave, such as waveform, and can freely choose and switch, and finally can be used for waveform output
Platform: | Size: 6144 | Author: 周易 | Hits:

[VHDL-FPGA-Verilog] sqrt

Description: verilog 硬件平方根算法采用与笔算平方根一样的算法-Verilog hardware and written calculation algorithm uses the square root of the square root of the same algorithm
Platform: | Size: 17408 | Author: lizhizhou | Hits:

[VHDL-FPGA-Verilog] BasedonVHDLdesigndigitalfrequencyof

Description: 本文用VHDL在CPLD器件上实现一种8 b数字频率计测频系统，能够用十进制数码显示被测信号的频率，不仅能够测量正弦波、方波和三角波等信号的频率，而且还能对其他多种物理量进行测量。具有体积小、可靠性高、功耗低的特点。-In this paper, VHDL in the CPLD device to achieve a 8 b digital frequency meter measuring frequency system that used the decimal digital display of measured signals in the frequency, not only to measure sine wave, square wave and triangular wave signals such as frequency, but also to other a variety of physical measurements. Small size, high reliability, low power consumption characteristics.
Platform: | Size: 224256 | Author: xiaoju | Hits:

[VHDL-FPGA-Verilog] onehehe

Description: verilog设计的4位频率计，可以测量方波、三角波、正弦波；测量范围10Hz～10MHz，测量分辨率1Hz，测量误差1 Hz；测量通道灵敏度50mv-Verilog design Cymometer 4, can be measured square wave, triangle wave, sine wave measuring range 10Hz ~ 10MHz, measurement resolution of 1Hz, the measurement error 1 Hz measurement channel sensitivity 50mV
Platform: | Size: 382976 | Author: oywj | Hits:

[VHDL-FPGA-Verilog] dds_bate4[1].1

Description: 在quartus软件下用VHDL语言实现DDS，可产生正弦，余弦，方波，三角波以及锯齿波。-In the Quartus software using VHDL language realize DDS, can generate sine, cosine, square, triangle and sawtooth waves.
Platform: | Size: 3014656 | Author: 崔浩然 | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: 实现4种常见波形正弦、三角、锯齿、方波（A、B）的频率、幅度可控输出（方波 A的占空比也是可控的），可以存储任意波形特征数据并能重现该波形，还可完成各种波形的线形叠加输出。 -Realize four kinds of common sine wave, triangle, sawtooth, square wave (A, B) the frequency, magnitude controllable output (square wave A, is also a controllable duty cycle), can store arbitrary waveform feature data and can reproduce the waveform, but also completed a variety of linear superposition of the output waveform.
Platform: | Size: 9216 | Author: zhanyi | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: PWM控制就是产生一定周期，占空比不同的方波信号，当占空比较大时，电机转速较高，否则电机转速较低。当采用FPGA产生PWM波形时，只需FPGA内部资源就可以实现，数字比较器的一端接设定值输出，另一端接线性递增计数器输出。当线性计数器的计数值小于设定值时输出低电平，当计数器大于设定值时输出高电平，这样就可通过改变设定值，产生占空比不同的方波信号，从而达到控制直流电机转速的目的。直流电机控制电路主要由2部分组成，如图1所示：  FPGA中PWM脉宽调制信号产生电路；  FPGA中正/反转方向控制电路 -PWM control is a certain cycle, a different duty cycle square wave signal, when the duty cycle is high, higher motor speed, or lower motor speed. When the PWM waveform generated using FPGA, the FPGA internal resources only can be achieved, the figure one comparator output termination setting, the other linear incremental counter output termination. When the value of linear counter output is less than low-level settings, when the counter output is greater than high settings, so that by changing the settings can produce different duty cycle square wave signal, DC motor control to achieve the purpose of speed. DC motor control circuit mainly by 2 parts, as shown in Figure 1:  FPGA in the PWM pulse width modulation signal generator circuit Chiang Kai-shek  FPGA/reverse direction control circuit
Platform: | Size: 37888 | Author: 袁玉佳 | Hits:

[Software Engineering] tetris

Description: Our project is to design and implement a Tetris game by using FPGA. Tetris a puzzle game that uses 4 square blocks joining edge to edge to form various combinations of shapes. There are 7 unique shapes. The shapes are controlled with the arrow keys from keypad or joystick. Both keypad and joystick are used to control the rotation of the shape. The reason we use both keypad and joystick as controller tool is that the players can have two options to control the game conveniently. However, we may use either keypad or joystick in our presentation to make the best effect. -Our project is to design and implement a Tetris game by using FPGA. Tetris is a puzzle game that uses 4 square blocks joining edge to edge to form various combinations of shapes. There are 7 unique shapes. The shapes are controlled with the arrow keys from keypad or joystick. Both keypad and joystick are used to control the rotation of the shape. The reason we use both keypad and joystick as controller tool is that the players can have two options to control the game conveniently. However, we may use either keypad or joystick in our presentation to make the best effect.
Platform: | Size: 5120 | Author: krishna | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: 利用VHDL实现任意函数发生器，包括方波、正弦波、三角波等。-The use of VHDL to achieve arbitrary function generator, including square, sine wave, triangle wave and so on.
Platform: | Size: 39936 | Author: 陈海巍 | Hits:

[VHDL-FPGA-Verilog] A-VHDL-Function-for-finding-SQUARE-ROOT

Description: vhdl coding for square root-vhdl coding for square root...
Platform: | Size: 3072 | Author: a.deivaseelan | Hits:

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[Other resource] vhdl平方根

[VHDL-FPGA-Verilog] 数字频率计实验报告

[VHDL-FPGA-Verilog] vhdl平方根

[VHDL-FPGA-Verilog] ddfs

[VHDL-FPGA-Verilog] wave_genarator_vhdl

[VHDL-FPGA-Verilog] arith_lib_cadence

[Algorithm] 2006-9-21PanWeicaiDDS

[VHDL-FPGA-Verilog] vhdl_buzzer

[VHDL-FPGA-Verilog] DDS234

[VHDL-FPGA-Verilog] box

[SCM] wave-generator

[VHDL-FPGA-Verilog] sqrt

[VHDL-FPGA-Verilog] BasedonVHDLdesigndigitalfrequencyof

[VHDL-FPGA-Verilog] onehehe

[VHDL-FPGA-Verilog] dds_bate4[1].1

[VHDL-FPGA-Verilog] VHDL

[VHDL-FPGA-Verilog] VHDL

[Software Engineering] tetris

[VHDL-FPGA-Verilog] VHDL

[VHDL-FPGA-Verilog] A-VHDL-Function-for-finding-SQUARE-ROOT

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