Search - state machines

[Other resource] vhdl程序例子

Description: vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers State Machines Registers Memory Systems ADC and DAC Arithmetic etc.
Platform: | Size: 169419 | Author: 王力 | Hits:

[Communication] Designing State Machines for FPGAs

Description: 有关FPGA中状态机开发的文章，内容很经典的，有开发例程。对硬件设计工程师比较有用-the FPGA development of the FSM article, as is the classic, development routines. Hardware design engineers more useful
Platform: | Size: 61216 | Author: 周 | Hits:

[Other resource] VHDLexample49

Description: VHDL的49个例子，例子丰富，有计数器、状态机、寄存器、汉明纠错码编码器、游戏程序-VHDL 49 examples, examples of rich, counters, state machines, register, Hamming ECC encoder, Games, etc.
Platform: | Size: 44507 | Author: 刘一 | Hits:

[Other resource] qpcpp_3.3.00

Description: Quantum Platform(QP) is a family of very lightweight, state machine-based frameworks for embedded systems. QP enables developing well-structured embedded applications as a set of concurrently executing hierarchical state machines (UML statecharts).
Platform: | Size: 1493826 | Author: sciwander | Hits:

[Embeded-SCM Develop] ALTERA_DE2_FSM_VHDL

Description: This an exercise in using finite state machines.基于ALTERA的DE2开发平台，设计一个有限状态机FSM(finite state machines).
Platform: | Size: 76130 | Author: sopc | Hits:

[Program doc] State_Machine_Coding_Styles_for_Synthesis

Description: 状态机的设计。在嵌入式开发中，状态机的使用越来越多，对于状态机的开发，本文给出了很多讲解。-State machine design. In the embedded development, the use of state machines, more and more development for the state machine, this paper gives a lot of explaining.
Platform: | Size: 123904 | Author: xms | Hits:

[Embeded-SCM Develop] ALTERA_DE2_FSM_VHDL

Description: This an exercise in using finite state machines.基于ALTERA的DE2开发平台，设计一个有限状态机FSM(finite state machines).-This an exercise in using finite state machines. Based on ALTERA s DE2 development platform to design a finite state machine FSM (finite state machines).
Platform: | Size: 75776 | Author: sopc | Hits:

[Data structs] FSM_Code

Description: This code supplements the tutorial in Finite State Machines
Platform: | Size: 23552 | Author: 李晋江 | Hits:

[Books] download6

Description: finite state machines about how build nedeterministic and deterministic forward pattern matching automata
Platform: | Size: 105472 | Author: sam007 | Hits:

[matlab] Technology-and-Application-of-System-Simulation-Ba

Description: 基于MATLAB_Simulink的系统仿真技术与应用本书首先介绍MATLAB语言的程序设计的基本内容，在此基础上系约介绍了系统仿真所必要的数值计算方法及MATLAB实现，并以Simu1ink为主要工具介绍了系统仿真方法与技巧，包括连续系统、离散系统、随机输入系统和复数系统的仿真，由浅入深介绍了模块封装技术、电力系统模块集、非线性系统设计模块集、S-函数编写与应用、Stateflow有限状态机、虚拟现实工具箱等中高级使用方法，最后还介绍了半实物仿真技术均实时控制技术。本书可作为一般读者学习和掌握MAlLAB／Simulink语言的教科书，也可作为高校理工科各类专业的本科生和研究生系统仿真类课程的教材和参考书，还可供科技工作者、教师作为学习和应用系统仿真分析技术解决实际问题的参考资料。-This book introduces MATLAB programming language, the basic content, in this based on the simulation system presented about the necessary numerical methods and MATLAB implementation, and Simu1ink introduced the system as the main tool for simulation methods and techniques, including the continuous system , discrete systems, stochastic input system and complex system simulation, Deep introduced module packaging technology, power system block set, set of nonlinear system design module, S-function and application of writing, Stateflow finite state machines, virtual reality tools use of boxes and other senior, finally introduced the loop simulation technology are real-time control technology.
Platform: | Size: 17889280 | Author: 商志远 | Hits:

[VHDL-FPGA-Verilog] Integrator-comb_timing-state

Description: 积分梳状滤波器和时序状态机的Verilog语言描述，适合硬件描述初学者-Integrator-comb filter and timing the Verilog language to describe state machines, hardware description suitable for beginners
Platform: | Size: 2048 | Author: 李菲 | Hits:

[VHDL-FPGA-Verilog] Creating-Safe-State-Machines

Description: Creating Safe State Machines
Platform: | Size: 1970176 | Author: Christoffer | Hits:

[VHDL-FPGA-Verilog] state-flowing-water-light

Description: 基于状态机的流水灯设计适合初学者学习-Based on fpga VHDL state machines of flowing water light
Platform: | Size: 68608 | Author: 启哈发 | Hits:

[VHDL-FPGA-Verilog] Finite-State-Machines

Description: 状态机，FPGA实验alter DE2开发板自带光盘的案例教程编程解析-State machine FPGA experiments alter the DE2 development board comes with a CD case tutorial programming resolution
Platform: | Size: 12288 | Author: 冷静 | Hits:

[Other] State-Machines-Hands-On-Exercises

Description: 讲述状态机在labview程序开发的重要性，-state machines
Platform: | Size: 971776 | Author: 徐晶晶 | Hits:

[Other] Buckland_Chapter2-State-Machines

Description: 这里一个有限状态机的例子，适合学习用，里面有三个程序，都是不同的程序，也有一个Common的文件，在VC++平如下运行时要导入这个文件，否刚系统编译找不到头文件而报-Here a finite state machine of example, suitable for learning to use, inside there are three procedures are different procedures, but also have a Common s file, VC++ level as follows run you want to import this file, whether just the system compiler find header files and reported. . .
Platform: | Size: 3368960 | Author: 陈官林 | Hits:

[LabView] Set-state-machine-core-code

Description: 实现状态机的跳转，状态的增加，状态的跳转-Jump jump to implement state machines, the state is increased, the state
Platform: | Size: 16384 | Author: yang | Hits:

[Software Engineering] Extended-Finite-State

Description: Slicing is useful for many Software Engineering applications and has been widely studied for three decades, but there has been comparatively little work on slicing Extended Finite State Machines (EFSMs).
Platform: | Size: 988160 | Author: sundar | Hits:

[VHDL-FPGA-Verilog] Finite-State-Machines

Description: 此壓縮檔包含四個資料夾(1)Moore Machine(2)Mealy Machine(3)Memory(4)A mini system，學習如何以階層化的方法去撰寫系統內部的小工作區塊，並了解迷你CPU內部的記憶體簡單的運作情形&資料串流-design the finite state machine and the mini system.
Platform: | Size: 10240 | Author: sara kuo | Hits:

[VHDL-FPGA-Verilog] Finite State Machines in Hardware

Description: Finite State Machines in Hardware.rar
Platform: | Size: 6001664 | Author: commando | Hits:

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[Other resource] vhdl程序例子

[Communication] Designing State Machines for FPGAs

[Other resource] VHDLexample49

[Other resource] qpcpp_3.3.00

[Embeded-SCM Develop] ALTERA_DE2_FSM_VHDL

[Program doc] State_Machine_Coding_Styles_for_Synthesis

[Embeded-SCM Develop] ALTERA_DE2_FSM_VHDL

[Data structs] FSM_Code

[Books] download6

[matlab] Technology-and-Application-of-System-Simulation-Ba

[VHDL-FPGA-Verilog] Integrator-comb_timing-state

[VHDL-FPGA-Verilog] Creating-Safe-State-Machines

[VHDL-FPGA-Verilog] state-flowing-water-light

[VHDL-FPGA-Verilog] Finite-State-Machines

[Other] State-Machines-Hands-On-Exercises

[Other] Buckland_Chapter2-State-Machines

[LabView] Set-state-machine-core-code

[Software Engineering] Extended-Finite-State

[VHDL-FPGA-Verilog] Finite-State-Machines

[VHDL-FPGA-Verilog] Finite State Machines in Hardware

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