Description: 静态时序分析，是IC design后端设计中最基本的基础部分-static timing analysis, design of the IC backend design the most basic part Platform: |
Size: 674401 |
Author:stefshen |
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Description: Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book describes the advanced concepts and techniques used towards ASIC chip synthesis, physical synthesis, formal verification and static timing analysis, using the Synopsys suite of tools.-Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book describes the advanced concepts and techniques used towards ASIC chip synthesis, physical synthesis, formal verification and static timing analysis, using the Synopsys suite of tools. Platform: |
Size: 2290136 |
Author:testsb |
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Description: 静态时序分析，是IC design后端设计中最基本的基础部分-static timing analysis, design of the IC backend design the most basic part Platform: |
Size: 673792 |
Author:stefshen |
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Description: xilinx的时序约束实验，通过阅读本文档，你可以用全局时序约束来轻松提高已有的项目的系统时钟频率，同时你还可以用映射后静态时序报告以及布局布线后静态时序报告来分析你的设计性能-Xilinx timing constraints of the experiment, by reading this document, you can use the overall timing constraints to easily enhance existing projects the system clock frequency, at the same time you can also use static timing report after mapping, as well as after placement and routing static timing analysis report to you design performance Platform: |
Size: 271360 |
Author:江巧微 |
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Description: Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book describes the advanced concepts and
techniques used towards ASIC chip synthesis, physical synthesis, formal
verification and static timing analysis, using the Synopsys suite of tools.-Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book describes the advanced concepts and
techniques used towards ASIC chip synthesis, physical synthesis, formal
verification and static timing analysis, using the Synopsys suite of tools. Platform: |
Size: 2289664 |
Author:eioruqoiu |
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Description: The emphasis of this book is on real-time application of Synopsys tools, used
to combat various problems seen at VDSM geometries. Readers will be
exposed to an effective design methodology for handling complex, submicron
ASIC designs. Significance is placed on HDL coding styles,
synthesis and optimization, dynamic simulation, formal verification, DFT
scan insertion, links to layout, physical synthesis, and static timing analysis.
At each step, problems related to each phase of the design flow are identified,
with solutions and work-around described in detail. In addition, crucial issues
related to layout, which includes clock tree synthesis and back-end
integration (links to layout) are also discussed at length. Furthermore, the
book contains in-depth discussions on the basics of Synopsys technology
libraries and HDL coding styles, targeted towards optimal synthesis solution. Platform: |
Size: 2244608 |
Author:wsea |
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Description: 静态时序分析（Static Timing Analysis简称STA）经由完整的分析方式判断IC是否能够在使用者的时序环境下正常工作，对确保IC质量之课题，提供一个不错的解决方案。然而，对于许多IC设计者而言，STA是个既熟悉却又陌生的名词。本文将力求以简单叙述及图例说明的方式，对STA的基础概念及其在IC设计流程中的应用做详尽的介绍。-Static timing analysis (Static Timing Analysis referred to as STA) through a complete analysis of ways to determine whether IC timing in the user' s normal work environment, to ensure the quality of the subject IC to provide a good solution. However, for many IC design engineers, STA is both familiar yet strange term. This paper will seek to a simple narrative, and legend in the manner described, the basic concept of the STA and its application in IC design process of doing a detailed introduction. Platform: |
Size: 726016 |
Author:王铭义 |
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Description: 本文主要对硬件电路的静态时序分析与逻辑设计，概念，工具使用等方法进行介绍说明-In this paper, the hardware circuits static timing analysis and logic design, concepts, tools and methods of use of an introductory statement Platform: |
Size: 563200 |
Author:gandj |
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Description: 静态时序分析教材，很多人对时序分析不了解，觉得很难，相信这个资料对你会有很大的帮助-Static timing analysis textbooks, many people do not understand the time-series analysis, find it hard to believe that this information will be of great help to you Platform: |
Size: 475136 |
Author:洪依 |
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Description: Static Timing Analysis is a method of computing the expected timing of a digital circuit without requiring simulation. Platform: |
Size: 7168 |
Author:ankit |
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Description: 静态时序分析100以太网控制芯片的应用，对用以太网的朋友很有帮助。-Static timing analysis of 100 Ethernet control chip, a friend of the use of Ethernet helpful. Platform: |
Size: 98304 |
Author:柳莺 |
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Description: 静态时序分析，有很详细的例子和图标说明，对于FPGA工程师非常有用，对于IC工程师也非常有用！(Static timing analysis, there are very detailed examples and icon descriptions.) Platform: |
Size: 4658176 |
Author:姚小菜123 |
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