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Description: Stereo-Vision circuit description, Aug 2002,
Ahmad Darabiha
This design contains four top level circuits: sv_chip0.vhd, sv_chip1.vhd, sv_chip2.vhd and
sv_chip3.vhd each of them built by one Virtex2000E fpga chip. This design is hierarchical and the
sub-circuits can be used as smaller benchmarks.
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Size: 420864 |
Author: junsung |
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Description: FPGA控制AIC23实现音频信号处理。AIC23是TI公司的高性能立体声处理芯片。-FPGA realization of the control AIC23 audio signal processing. AIC23 is a stereo TI' s high-performance processing chip.
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Size: 1456128 |
Author: |
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Description: fpga的双目立体视觉系统，选题新颖，文档规范，望采纳-novel the fpga binocular stereo vision system, topics specification document, looking to adopt
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Size: 5987328 |
Author: 尹鹏 |
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Description: FM Stereo modulator FPGA
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Size: 2054144 |
Author: Dusit
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