Search - switch on de2

[SCM] 16bit_display8bitLED

Description: Abstract七段显示器在DE2可当成Verilog的console，做为16进位的输出结果。Introduction使用环境：Quartus II 7.2 SP1 + DE2(Cyclone II EP2C35F627C6)简单的使用switch当成2进位输入，并用8位数的七段显示器显示16进位的结果。-Abstract Seven-Segment Display as Verilog to DE2 at the console, as 16 of the output binary. Introduction to use the environment: Quartus II 7.2 SP1+ DE2 (Cyclone II EP2C35F627C6) the use of a simple switch as a binary input 2, and paragraph 8-digit binary display 16 results.
Platform: | Size: 7168 | Author: 王媛媛 | Hits:

[VHDL-FPGA-Verilog] 4bit_switch

Description: 4 bit switch on altera de2
Platform: | Size: 335872 | Author: Kei | Hits:

[VHDL-FPGA-Verilog] part2

Description: Implement a 3-digit BCD counter. Display the contents of the counter on the 7-segment displays, HEX2− 0. Derive a control signal, from the 50-MHz clock signal provided on the DE2 board, to increment the contents of the counter at one-second intervals. Use the pushbutton switch KEY0 to reset the counter to 0.
Platform: | Size: 552960 | Author: echo | Hits:

[VHDL-FPGA-Verilog] IMAGE_ROTATION_v2

Description: 基于DE2-115开发板，采用控制波动开关 SW[2:0]实现图像±45°，±90°旋转及VGA显示-Implementing the rotation of image based on DE2-115 board. Used switch SW[2:0] to control the orientation of rotating image(±45°&±90°).
Platform: | Size: 300032 | Author: QPHuang | Hits:

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[SCM] 16bit_display8bitLED

[VHDL-FPGA-Verilog] 4bit_switch

[VHDL-FPGA-Verilog] part2

[VHDL-FPGA-Verilog] IMAGE_ROTATION_v2

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