Search - test SDRAM

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[Other resource] verilog SDRAM core DL : 0: 我用过的verilog hdl写的SDRAM core源程序,经过测试应用-I used to write Verilog HDL source of SDRAM core, the test application
Update : 2008-10-13 Size : 27.76kb Publisher : 于飞
[Embeded-SCM Develop] S3C44B0X-test DL : 0: s3c44b0 的开发板测试的所有源代码及程序！！！汇编代码主要完成系统初始化，包括：禁止看门狗；禁止所有中断；初始化存储器（包括SDRAM）；设定锁相环倍频；使能所有单元模块时钟；初始化堆栈；设置中断等等 C语言代码主要是应用代码，包括：设置使用指令缓存；修改系统主时钟为32MHz； IO端口功能、方向设定；初始化中断；初始化DMF50081液晶模块；蜂鸣器测试；液晶显示测试； LED输出测试；定时器、PWM测试等；
Update : 2008-10-13 Size : 4.29kb Publisher : 叶凌
[Other resource] sdram DL : 0: sdram test controller altera
Update : 2008-10-13 Size : 1.45mb Publisher : yangchun
[OS Develop] SDRAM_test_code DL : 0: test sdram sample code
Update : 2008-10-13 Size : 5.91kb Publisher : 鏋楀缓
[VHDL-FPGA-Verilog] verilog SDRAM core DL : 1: 我用过的verilog hdl写的SDRAM core源程序,经过测试应用-I used to write Verilog HDL source of SDRAM core, the test application
Update : 2025-02-17 Size : 27kb Publisher : 于飞
[VHDL-FPGA-Verilog] SDRAMtest DL : 0: SDRAM的读写测试，便于大家深入了解SDRAM的工作原理！-SDRAM read and write tests for our in-depth understanding of the working principle of SDRAM!
Update : 2025-02-17 Size : 153kb Publisher : 张文
[VHDL-FPGA-Verilog] sdram DL : 0: sdram test controller altera -sdram test controller altera
Update : 2025-02-17 Size : 1.45mb Publisher : yangchun
[DSP program] RD_DevuceID_Fr_McBSP0_to_SDRAM_ok DL : 0: dsp 5509a 存储器测试, SDRAM 测试程序,12Mx16=192/2=96Msdram 时钟-dsp 5509a memory test, SDRAM test procedure, 12Mx16 = 192/2 = 96Msdram clock
Update : 2025-02-17 Size : 424kb Publisher : sam Hui
[DSP program] test DL : 0: it is programed on dsk6455，and test * 1 Internal memory Version * 2 External memory(SDRAM) * 3 Flash * 4 Codec * 5 UserIO * 6 MemPattern(Fill pattern) * 7 MemPattern(Address Pattern) * 8 DSP * 9 LED/Swt * 10 Codec LoopBack *-it is programed on dsk6455, and test* 1 Internal memory Version* 2 External memory (SDRAM)* 3 Flash* 4 Codec* 5 UserIO* 6 MemPattern (Fill pattern)* 7 MemPattern (Address Pattern)* 8 DSP* 9 LED/Swt* 10 Codec LoopBack*
Update : 2025-02-17 Size : 246kb Publisher : fan
[OS Develop] test DL : 0: PXA27X裸机测试程序，包括FLASH、SDRAM、GPIO测试-PXA27x bare-metal test procedures, including FLASH, SDRAM, GPIO Test
Update : 2025-02-17 Size : 233kb Publisher : Ronghua
[VHDL-FPGA-Verilog] (fpga)sdram DL : 0: verilog 代码，读写SDRAM 不带仿真，需要自己编写测试文件-Verilog code, read and write SDRAM simulation without the need to prepare their own test documentation
Update : 2025-02-17 Size : 19.01mb Publisher : ch
[ARM-PowerPC-ColdFire-MIPS] TEST DL : 0: S3c2440硬件测试程序，主要功能包括：SDRAM读写测试，整片Falsh读写测试，Flash擦除，坏块检测，flash复制数据到SDRAM-S3c2440 hardware testing procedures, the main features include: SDRAM read and write tests, reading and writing test Falsh whole, Flash erase bad block detection, flash copy the data to the SDRAM
Update : 2025-02-17 Size : 491kb Publisher : 冯健
[VxWorks] ts201_Test_SDRAM DL : 0: DSP TS201 Test SDRAM Over
Update : 2025-02-17 Size : 599kb Publisher : qin
[ARM-PowerPC-ColdFire-MIPS] 2410test-code DL : 0: 三星2410试验源码,包括clock,nand ,sdram,led,key,timer-test-code of 2410,include clock,nand ,sdram,led,key,timer
Update : 2025-02-17 Size : 312kb Publisher : dorisfu
[VHDL-FPGA-Verilog] sdram DL : 0: 程序说明: 本次实验控制开发板上面的SDRAM完成读写功能。先向SDRAM里面写数据，然后再将数据读出来做比较，如果不匹配就通过LED变亮显示出来，如果一致，LED就不亮。 part1是使用Modelsim仿真的工程 part2是在开发斑上面验证的工程目录说明: part1: part1_32是4m32SDRAM的仿真工程 part1_16是4m16SDRAM的仿真工程 \model文件夹里面是仿真模型 \rtl文件夹里面是源文件 \sim文件夹里面是仿真工程 \test_bench文件夹里面是测试文件 \wave文件夹里面是仿真波形 -Procedure Note: In this experiment, control development board to complete the above SDRAM read and write capabilities. SDRAM write data inside first and then read out the data to compare, if you do not match on the adoption of LED variable light display, if agreed, LED does not light. part1 is to use Modelsim simulation project part2 the top spot verification in the development of the project directory Description: part1: part1_32 is 4m32SDRAM simulation project part1_16 is 4m16SDRAM simulation works \ model folder, which is a simulation model \ rtl folder, which is the source file \ sim is a simulation project inside the folder \ test_bench folder which is a test file \ wave inside the folder is a simulation waveform
Update : 2025-02-17 Size : 761kb Publisher : 军军
[Other Embeded program] sdram DL : 0: TI TMS320 DM642 开发板 SDRAM测试工程-Test project of SDRAM module for DM642 EVM
Update : 2025-02-17 Size : 186kb Publisher : 张超
[DSP program] 3.2.3-sdram DL : 0: DSP 6713编程，源代码，调试完全正确，SDRAM测试程序，有用-DSP 6713 programming, source code, debugging completely correct, SDRAM test program, useful
Update : 2025-02-17 Size : 163kb Publisher : 周吧
[VHDL-FPGA-Verilog] SDRAM DL : 0: 使用VHDL语言编写的对SDRAM进行读写操作控制器及其简单的测试层序。(VHDL language used to read and write operations controller SDRAM and its simple test sequence.)
Update : 2025-02-17 Size : 25.75mb Publisher : Devil0823
[VHDL-FPGA-Verilog] SDRAM缓冲测试程序 DL : 0: 对FPGA的SDRAM进行测试，主要是实现FIFO-SDRAM-FIFO的数据传输(Test the SDRAM of the FPGA)
Update : 2025-02-17 Size : 72.53mb Publisher : 降落
[VHDL-FPGA-Verilog] FPGA读写SDRAM的实例 DL : 0: FPGA对SDRAM进行读写测试程序，亲测有效无误。(FPGA reads and writes test programs for SDRAM.)
Update : 2025-02-17 Size : 19mb Publisher : 蠢月月

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