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[ARM-PowerPC-ColdFire-MIPSARM JTAG 调试原理

Description: 这篇文章主要介绍ARM JTAG调试的基本原理。基本的内容包括了TAP (TEST ACCESS PORT) 和BOUNDARY-SCAN ARCHITECTURE的介绍,在此基础上,结合ARM7TDMI详细介绍了的JTAG调试原理。-This article introduces the ARM JTAG debugging basic tenets. The basic elements include the TAP (TEST PORT ACCESS) and BOUNDARY- SCAN ARCHITECTURE presentation on this basis, the combined ARM7TDMI details of the principles of JTAG debugging.
Platform: | Size: 452608 | Author: 李易 | Hits:

[Linux-Unixmemtest86-3.2.tar

Description: Memtest86 is thorough, stand alone memory test for Intel/AMD x86 architecture systems. BIOS based memory tests are only a quick check and often miss failures that are detected by Memtest86.-testing is thorough, stand alone memory test for the Intel/AMD x86 Archi tecture systems. BIOS memory tests are based on ly a quick check and often miss failures that are detected by testing.
Platform: | Size: 131072 | Author: gloryn | Hits:

[OtherJtag-principle

Description: 这篇文章主要介绍ARM JTAG调试的基本原理。基本的内容包括了TAP (TEST ACCESS PORT) 和BOUNDARY-SCAN ARCHITECTURE的介绍,在此基础上,结合ARM7TDMI详细介绍了的JTAG调试原理。-This article introduces the ARM JTAG debugging basic tenets. The basic elements include the TAP (TEST PORT ACCESS) and BOUNDARY- SCA N ARCHITECTURE presentation on this basis, combining ARM7TDMI details of the JTAG Debugging principle.
Platform: | Size: 452608 | Author: fangyy1 | Hits:

[JSP/Javatest(jsp+servlet+javaBean+sql_server)

Description: 用jsp+servlet+netbean+sql2000实现的bs架构的学生管理系统-With jsp+ Servlet+ Netbean+ Sql2000 realize the bs architecture student management system
Platform: | Size: 39936 | Author: tang | Hits:

[VHDL-FPGA-VerilogDDR_SDRAM_controller

Description: DDR SDRAM控制器的VHDL源代码,含详细设计文档。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock Manager (DCM) provides the required Delay Locked Loop (DLL), Digital Phase Shift (DPS), and Digital Frequency Synthesis (DFS) functions. This application note describes a controller design for a 16-bit DDR SDRAM. The application note and reference design are enhanced versions of XAPP200 targeted to the Virtex-II series of FPGAs. At a clock rate of 133 MHz, 16-bit data changes at both clock edges. The reference design is fully synthesizable and achieves 133 MHz performance with automatic place and route tools.-DDR SDRAM controller VHDL source code, including detailed design documents. The DDR, DCM, and SelectI/O
Platform: | Size: 132096 | Author: xbl | Hits:

[VHDL-FPGA-Verilogtest

Description: wARM体系结构的VHDL设计,研究ARM体系设计很有用-WARM VHDL architecture design, research useful ARM System Design
Platform: | Size: 3640320 | Author: | Hits:

[Otherxitongshijuan

Description: 计算机系统结构试卷与课后习题的答案,对于学习系统结构的朋友,是很有帮助,因为我就是个例子-Computer system architecture test papers and answer after-school exercise, learning system for the structure of friends, is very helpful, because I is an example
Platform: | Size: 533504 | Author: laixianhang | Hits:

[Linux-Unixffaudio.tar

Description: Linux OSS声卡驱动测试程序,支持播放,录制,支持多种速率,多种格式,以及通道。如有其他特殊需要,只需添加ioctl接口即可。 本程序在Linux 2.6.20下测试通过,并可方便地移植到MIPS/ARM架构CPU上。-Linux OSS sound drivers test procedures in support of broadcast, recording, supports a wide range of rates, a variety of formats, as well as the channel. If there are other special needs, simply add the ioctl interface to. This procedure to test the adoption of Linux 2.6.20, and easily ported to MIPS/ARM architecture CPU on.
Platform: | Size: 2048 | Author: H Simon | Hits:

[AI-NN-PRMLPNetworksimulation

Description: Matlab 下 BP 神经网络的举例及详细说明。美国大学的一个实验。 虽然是 PDF文件,但程序可以直接粘贴下来运行。-The process to train and test a designed MLP neural network : 1) We make training patterns and test patterns. 2) A network architecture should be defined by newff MATLAB function with the number of layers, neurons and transfer functions. 3) The defined neural network architecture is trained by train MATLAB function with input patterns and training parameters. 4) We can easily check the result by using a sim MATLAB function.
Platform: | Size: 100352 | Author: zhulz | Hits:

[Other systemsTest

Description: 入侵检测系统snort,代码纷繁复杂,程序文件很多,对于新手,很难分析清楚源代码,但是源代码确实研究入侵检测系统分场重要的工具。 本资料详细分析了入侵检测系统snort的体系结构,程序源代码,主要数据结构和重要函数。-Intrusion Detection System snort, complex code, a lot of program files, for novices, it is difficult to analyze the source code, but the study of the source code is indeed an important breakout intrusion detection system tools. A detailed analysis of the information system snort intrusion detection architecture, the program source code, the main data structure and an important function.
Platform: | Size: 146432 | Author: 王浩 | Hits:

[CA authinter-domain-test

Description: Xen 域间通信的访问控制的例子,主要用于TPM的域间密钥共享协同。在Xen/Linux上实现的一个原型系统。-In this thsis, we introduce a TPM based trust scheme and secure protocol for VM, and develop a prototype system of the secure protocol for Xen/Linux virtualization system. The trust scheme can protect all VMs and prevent attacks from compromised VMs by the chain of trust model. The turst scheme creates an unified trusted environment for all VMs on the system. The secure protocol is an approach of the trust scheme. It ensures the overall security of all VMs on an system and allows two users from any VMs to perform mutual indentity authentication and secure communication. The architecture and design priciple of the protocol implementation have been discussed in detail.
Platform: | Size: 1454080 | Author: 陈天明 | Hits:

[Software EngineeringIEEE1ne

Description: IEEE1641标准的自动测试系统体系结构IEEE1641 standard automatic test system architecture-IEEE1641 standard automatic test system architecture
Platform: | Size: 1570816 | Author: mic234 | Hits:

[Windows Developcomputer-architecture-

Description: 软件工程,计算机系统结构的测试题目,可用来考试备用-Software engineering, computer architecture of the test questions can be used to test alternative
Platform: | Size: 9216 | Author: 徐尉 | Hits:

[JSP/JavaAutomated-Generation-of-Test-Cases

Description: 使用模型驱动的方法自动生成测试用例,从软件的设计到软件的生成再到测试全部基于MDA架构-Automated Generation of Test Cases Using Model-Driven Architecture
Platform: | Size: 226304 | Author: lily | Hits:

[JSP/JavaArchitecture-experiment

Description: 中南大学软件学院,体系结构课程,实验三种的几个测试项目,供校友使用-Central South University, School of Software Architecture course, the experiment three test items for alumni use
Platform: | Size: 54272 | Author: 张林 | Hits:

[Windows Developtest

Description: 计算机组成与结构的习题,用于初学者的复习备考资料-Computer organization and architecture of exercises to review the pro forma information for beginners
Platform: | Size: 99328 | Author: tanbo | Hits:

[SCMtest-hex

Description: test-hex是基于at89c51的体系结构上的c程序,里面有矩阵键盘扫描程序,ad9850芯片的驱动程序。-test-hex a at89c51 of architecture on c program, matrix keyboard scanner, the ad9850 chip driver.
Platform: | Size: 11264 | Author: zhujiatian | Hits:

[Embeded LinuxMIPI_VIDEO-MODE-TEST-PROGRAM

Description: 此例程是基于ARM9+SSD2825构架的高清LCD测试程序,可用于测试MIPI_VIDEO和MIPI_command 模式下的WVGA,FWVGA,QHD等高清手机LCM。支持4通道MIPI接口,SSD2825是 晶门科技的高速4通道MIPI传输器。-This routine is the HD LCD based on ARM9+SSD2825 architecture test program can be used for high-definition WVGA, FWVGA, QHD the the test MIPI_VIDEO MIPI_command mode phone LCM. 4-lane MIPI interface, SSD2825 Solomon Systech' s high-speed 4-lane MIPI transmitter.
Platform: | Size: 8365056 | Author: 鲁洲明 | Hits:

[Software Engineeringarchitecture-course-design

Description: 组成原理课程设计 编写应用程序,实现以下功能: 通过机器指令集实现两个二进制数的四则运算。数据通过IN指令输入到A累加器中,输入菜单选项选取运算的方式(1:乘法,2:加法,3:减法,4:除法)。 输入形式:数据输入形式为二进制,第一个数据为第一个运算数,第二个数据为第二个运算数,第三个数据为菜单选项。 输出形式:通过实验箱上的out输出端口显示,显示形式为十六进制数。 实现说明: 乘法:通过循环使用加法实现乘法功能,第二个操作数作为被乘数,对其自身累加,当累加等于第一个操作数的时候,记录其累加次数,此累加次数便是out输出的结果。 加法:通过现有指令ADD实现两个操作数的加法运算 减法:通过现有指令SUB实现两个操作数的减法运算 除法:通过循环使用ADD,SUB指令和JC,JZ比较运算数的大小实现除法功能,将除数作为倍数累加,不断与被除数比较大小最后得出最终的累计次数,得出计算结果。-Architecture course design Write applications to achieve the following functions: Two binary number four machine instruction set computing. Data IN instruction input to the A accumulator input menu option selected operator (1: multiplication, 2: Addition 3: subtraction, 4: division). Input forms: the form of input data to binary, the first data for the first operand, the second data for the second operand, the third data as a menu option. Output in the form: out output port on the test box is displayed, showing the form of a hexadecimal number. Implementation Notes: Multiplication: cycle through the use of addition and multiplication function, the second operand as a multiplicand, accumulation of its own, when the accumulation is equal to the first operand, recording its accumulated number of times, the accumulated number of times is the result of the out output . Addition: the addition of the two operands through existing instruction ADD Subtraction: the su
Platform: | Size: 3156992 | Author: xyy | Hits:

[Windows Developcomputer-architecture-

Description: 软件工程,计算机系统结构的测试题目,可用来考试备用-Software engineering, computer architecture of the test questions can be used to test alternative
Platform: | Size: 9216 | Author: produ | Hits:
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