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Description: Altera公司开发板1c20 CF卡通用例程(初始化、读、写、测试等)-Altera Corporation development board 1c20 CF cartoon with routines (initialization, reading, writing, testing, etc.)
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Size: 6514 |
Author: yl |
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Description: altera串口源代码程序-ALTERA source code procedures
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Size: 5120 |
Author: 梁远 |
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Description: altera推出的基于它们fpga和cpld的构建嵌入式系统的新技术sopc的介绍。其集成在quartus II中-ALTERA due to launch them and they simply cpld Construction of the new Embedded System Technology sopc briefing. Its integrated into the Quartus II
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Size: 8863744 |
Author: 刘吉 |
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Description: FPGA/CPLD应用,uart通讯VHDL原码.-FPGA/CPLD applications, UART communications VHDL source.
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Size: 10240 |
Author: cyberworm |
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Description: Altera公司开发板1c20 CF卡通用例程(初始化、读、写、测试等)-Altera Corporation development board 1c20 CF cartoon with routines (initialization, reading, writing, testing, etc.) -Altera Corporation development board 1c20 CF Card routines (initialization, read, write, test, etc.)-Altera Corporation development board 1c20 CF cartoon with routines (initialization, reading, writing, testing, etc.)
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Size: 6144 |
Author: yl |
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Description: altera 的uart ip核,可直接调用
在quartus中把库指向文件位置就可-altera the uart ip nuclear, can be directly called in the Quartus point in the database file location can be
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Size: 5120 |
Author: 李涛 |
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Description: UART16550兼容的串行通讯控制器,Verilog语言描述,采用Altera Cyclone系列芯片实现FPGA综合,因为FIFO部分利用到内部资源实现。已经在某项目中成功应用,特此推出。-UART16550 compatible serial communication controller, Verilog language description, the use of Altera Cyclone series FPGA chip integrated, as part of the use of FIFO to the internal resources to achieve. Projects have been in a successful application, is hereby introduced.
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Size: 10240 |
Author: David.Mr.Liu |
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Description: 自适应波特率的通用异步串行接口电路(UART)的VHDL源码,在ALTERA上运行成功-Adaptive baud rate of the universal asynchronous serial interface circuit (UART) the VHDL source code, to run successfully in ALTERA
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Size: 9216 |
Author: 甘甜 |
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Description: 里面包含15个altera的IP核的源代码,包括I2C,UART,VGA_SYN-Which contains 15 nuclear altera the IP source code, including I2C, UART, VGA_SYN
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Size: 49152 |
Author: hhl |
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Description: altera nios uart en文档,官方的最底层的驱动开发-altera nios uart
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Size: 196608 |
Author: sunlichao |
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Description: uart的vhdl实现,包含完整quartus工程文件,相信会有较大帮助-uart vhdl quartus
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Size: 212992 |
Author: Carlin |
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Description: 基于ALTERA公司的NIOSII的串口通信DMA传输设计-NIOSII based on ALTERA s DMA transfer of the serial communication design
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Size: 11346944 |
Author: 王超 |
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Description: altera ep2c8V2 开发实例 timer uart I2C key interrupt 等-altera ep2c8V2 examples timer uart I2C key interrupt etc.
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Size: 11765760 |
Author: chris |
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Description: uart 16450合集,xilin altera lattice-collection of uart controller 16450
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Size: 822272 |
Author: jhv |
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Description: Configuration and usage of Altera s JTAG UART.
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Size: 5648384 |
Author: shahbaz |
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Description: 用ALTERA的芯片做的多串口代码,内部做了3个通用串口,适合51 ARM等CPU,有完整的ALTERA工程和仿真波形-uart FOR ALTERA
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Size: 1571840 |
Author: 郭强 |
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Description: altera公司的fpga源代码,用VHDL编写的uart程序。-altera' s fpga source code, uart program written using VHDL.
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Size: 32768 |
Author: 张东 |
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Description: Altera FPGA的UART通讯程序-Altera FPGA' s UART communication program
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Size: 495616 |
Author: bobpark |
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Description: 利用FPGA实现了UART编解码功能,已在Xilinx及Altera多种型号FPGA例化使用。附有寄存器使用说明。(a useful UART decoder and encoder.)
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Size: 48128 |
Author: 帕萨迪纳
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Description: 嵌入式串口通讯,采用verilog编写,在altera开发板上运行(Embedded serial communication, written using Verilog, altera development board on the run)
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Size: 2843648 |
Author: 歪歪mao
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