Search - uart 16550

[Other resource] mips-uart-16550

Description: MIPS架构下串口API函数集合,包括getchar\\putchar\\scanf\\printf-MIPS architecture Serial API function set, including getchar \\ putchar \\ Scanf \\ printf
Platform: | Size: 3976 | Author: 栋梁 | Hits:

[VHDL-FPGA-Verilog] H16550_2[1].0V

Description: 专门做处理器和周边接口的著名ipcore厂商CAST出品的UART H16550 ，包含完整的使用说明手册、testbench、可综合，如果被网站认可，将继续上传其余的几个更好的core。-specialized processor and peripheral interfaces famous ipcore CAST product manufacturers UART H16 550, including full use manual testbench can be integrated, if the site is approved, the rest will continue to upload a few better core.
Platform: | Size: 386048 | Author: 宋云成 | Hits:

[ARM-PowerPC-ColdFire-MIPS] mips-uart-16550

Description: MIPS架构下串口API函数集合,包括getchar\putchar\scanf\printf-MIPS architecture Serial API function set, including getchar \ putchar \ Scanf \ printf
Platform: | Size: 4096 | Author: 栋梁 | Hits:

[Windows Develop] uart16550.tar

Description: The UART (Universal Asynchronous Receiver/Transmitter) core provides serial communication capabilities, which allow communication with modem or other external devices, like another computer using a serial cable and RS232 protocol. This core is designed to be maximally compatible with the industry standard National Semiconductors’ 16550A device. -The UART (Universal Asynchronous Receive r/Transmitter) core provides serial Communic ation capabilities, which allow communication with the modem or other e xternal devices, like another computer using a serial cable and R RS232 protocol. This core is designed to be maxim ally compatible with the industry standard Nat ional Semiconductors' 16550A device.
Platform: | Size: 187392 | Author: 邓云 | Hits:

[Software Engineering] m16550a_verilog_rtl

Description: mentor UART IP verilog源码以通过验证.-mentor UART IP verilog source to the test.
Platform: | Size: 25600 | Author: cray | Hits:

[Com Port] PCCOM-SRC

Description: 用C++写的RS232串口异步通讯功能模块，支持16550 UART芯片，中断收发数据，波特率最大115200bps，自定义收发数据缓冲大小，支持软硬件流控。-C wrote asynchronous RS232 serial communication module, 16550 UART chip, Transceivers interruption data, 115,200 bps maximum baud rate, since the definition of sending and receiving data buffer size, support hardware and software flow control.
Platform: | Size: 103424 | Author: alex | Hits:

[Com Port] uart16550

Description: uart16550　ＩＰ核ＨＤＬ源代码，对设计自己uart的人员和学习串口通讯有一定的参考价值！其中，附有详细的所明文档！-uart16550 IP HDL source code, uart to design their own study of serial communication and has some reference value. Which, with detailed documentation as prescribed!
Platform: | Size: 291840 | Author: Jack | Hits:

[VHDL-FPGA-Verilog] uart_core_vhdlORverilog

Description: 串uart的vhdl，verilog，lattic实现原码里面有四个文件,分别UART 源码 (lattice version)\uart 源码 (Verilog)\uart 源码 (VHDL)\uart16550.tar-uart series of vhdl and verilog. lattic achieve the original code, there are four documents, Source respectively UART (lattice version) \ uart source (Verilog) \ uart source (VHDL) \ uart16550.tar
Platform: | Size: 294912 | Author: efly | Hits:

[MPI] Uart_16550_Verilog_Source

Description: UART_16550_verilogHDL源程序，用在lattice芯片上面运行，保证能用的好资料-UART_16550_verilogHDL source, lattice chip used in the above operation can be used to ensure good information
Platform: | Size: 472064 | Author: 成刚 | Hits:

[SCM] UART

Description: Universal Asynchronous Receiver/Transmitter，通用异步接收/发送装置，UART是一个并行输入成为串行输出的芯片，通常集成在主板上，多数是16550AFN芯片。-Universal Asynchronous Receiver/Transmitter, universal asynchronous receive/transmit device, UART is a parallel input serial output of the chip to become normally integrated on the motherboard, most 16550AFN chip.
Platform: | Size: 114688 | Author: 清风 | Hits:

[Linux-Unix] ns16550

Description: ns 16550 linux uart driver -ns 16550 linux uart driver
Platform: | Size: 1024 | Author: tony wang | Hits:

[Com Port] uart

Description: uart协议、实现、验证，基于wishbone协议，工业标准为16550A-UART protocol, implementation, verification, based on the Wishbone protocol, the industry standard for the 16550A
Platform: | Size: 257024 | Author: dannel218 | Hits:

[Com Port] uart16750_latest.tar

Description: Implements a 16550/16750 UART core
Platform: | Size: 100352 | Author: Arun | Hits:

[Com Port] uart16550

Description: uart16550 is a 16550 compatible (mostly) UART core. The bus interface is WISHBONE SoC bus Rev. B. Features all the standard options of the 16550 UART: FIFO based operation, interrupt requests and other. The datasheet can be downloaded from the CVS tree along with the source code. -uart16550 is a 16550 compatible (mostly) UART core. The bus interface is WISHBONE SoC bus Rev. B. Features all the standard options of the 16550 UART: FIFO based operation, interrupt requests and other. The datasheet can be downloaded from the CVS tree along with the source code.
Platform: | Size: 1760256 | Author: CloudZhang | Hits:

[VHDL-FPGA-Verilog] uart16550_latest[1].tar

Description: 开源UART IP核16550，该IP核兼容16550 UART，具有Modem功能，完全可编程的串行接口具有可设置的字符长度、奇偶校验、停止位以及波特率生成器。-Open-source UART IP core 16550, the IP core is compatible with 16550 UART, with Modem function, fully programmable serial interface can be set up with a character length, parity, stop bits and baud rate generator.
Platform: | Size: 1559552 | Author: lisa1027 | Hits:

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[Other resource] mips-uart-16550

[VHDL-FPGA-Verilog] H16550_2[1].0V

[ARM-PowerPC-ColdFire-MIPS] mips-uart-16550

[Windows Develop] uart16550.tar

[Software Engineering] m16550a_verilog_rtl

[Com Port] PCCOM-SRC

[Com Port] uart16550

[VHDL-FPGA-Verilog] uart_core_vhdlORverilog

[MPI] Uart_16550_Verilog_Source

[SCM] UART

[Linux-Unix] ns16550

[Com Port] uart

[Com Port] uart16750_latest.tar

[Com Port] uart16550

[VHDL-FPGA-Verilog] uart16550_latest[1].tar

[VHDL-FPGA-Verilog] uart16550

[Other] UART-16550-compatible

[Linux-Unix] uart-16550

[Linux-Unix] uart-16550

[Linux-Unix] 16550_serpi-master

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