Description: UART 处理的是并行数据转换为串行信号和串行信号转换为并行数据。现有的时钟不精确,这就需要用一个远高于波特率的本地时钟信号对输入信号不断采样,以不断让接收器与发送器保持同步。-UART to handle is the parallel data into a serial signal and serial signal is converted to parallel data. Existing imprecise clock, which requires a much higher than the baud rate of the local clock signal for sampling the input signal continuously to continuously allow the receiver to maintain synchronization with the transmitter. Platform: |
Size: 1024 |
Author:xuye |
Hits:
Description: 在ISE环境下，用VHDL语言实现RS232串口设计，实现串口通信。通过串口调试工具向
0000000UART发送16进制数，FPGA将UART接收到的串行数据转换为并行数据，并在8个
LED灯上输出显示；同时，并行数据又被重新转换为串行数据，重新送给RS-232接口，并在
串口调试工具上再次显示，SW0为复位键。
比如：串口调试工具发送两位16进制数，然后能在LED上显示，并且重新在串口调试工
具上显示。串口调试工具设置：波特率设为9600，默认奇校验。-In the ISE environment, using VHDL language RS232 serial port design, serial communication. Through the serial debugging tool to
0000000UART Send a hexadecimal number, FPGA serial data received by the UART converted to parallel data, and 8
LED lights on the output display the same time, parallel data has been re-converted to serial data, re-sent to the RS-232 interface, and in
Serial debugging tools on the show again, SW0 for the reset button.
For example: serial debugging tool to send two 16 hexadecimal number, and then can be displayed on the LED, and re-debugging in the serial port
With a display. Serial debugging tool settings: baud rate is set to 9600, the default odd parity. Platform: |
Size: 403456 |
Author:panda |
Hits:
Search - uart serial to parallel vhdl