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[VHDL-FPGA-Verilog] Chapter6Sample DL : 0: 描述了使用FPGA接口PDIUSBD12开发USB接口的流程.-Describes the use of FPGA Interface USB interface PDIUSBD12 development flow.
Update : 2025-02-17 Size : 138kb Publisher : 玄冰
[Other Embeded program] ip DL : 0: usart的verilog代码.rar 包括很多的FPGA ip 源码，可以直接应用 uart_vhdl.zip sl811usb包含源程序.rar mc8051_design.zip mcpu_1[1].05.zip minicpu.zip mmc_lark_original.zip -USART the Verilog code. rar, including many of the FPGA ip source, can be applied directly uart_vhdl.zipsl811usb contains the source code. rarmc8051_design.zipmcpu_1 [1] .05. zipminicpu.zipmmc_lark_original.zip
Update : 2025-02-17 Size : 5.14mb Publisher : 钟阳
[USB develop] usb DL : 0: 实现了USB接口。介绍了如何使用VERILOG语言实现USB的程序设计。-Realize the USB interface. Introduce how to use the Verilog language programming USB realize.
Update : 2025-02-17 Size : 137kb Publisher : xiexiao
[VHDL-FPGA-Verilog] 8051core-Verilog DL : 0: 一个Verilog写的8051 MCU实现-Write a Verilog realization of the 8051 MCU
Update : 2025-02-17 Size : 54kb Publisher : chen
[VHDL-FPGA-Verilog] USB DL : 0: USB接口的测试程序，Verilog语言编写 -USB
Update : 2025-02-17 Size : 137kb Publisher : wzk
[source in ebook] USBverilog DL : 0: verilog USB程序，经过实践调试，并且都能成功实现-verilog USB procedures, debugging practice, and can be successfully achieved
Update : 2025-02-17 Size : 137kb Publisher : 林
[VHDL-FPGA-Verilog] USB DL : 0: Verilog实现的USB程序，用ISE打开工程文件即可-Verilog implementation USB program, open the project file with the ISE can be
Update : 2025-02-17 Size : 137kb Publisher : Roy
[Communication] verilog DL : 0: source code for USB 2.0 fonction core in verilog
Update : 2025-02-17 Size : 56kb Publisher : chaitanya
[VHDL-FPGA-Verilog] fifo DL : 0: fifo用Verilog hdl的实现，这是一个比较常用的源码，文档中有很详细的注释，初学者应该可以看懂。-implementation using Verilog hdl usb, this is a common source, the document had a very detailed notes, beginners should understand.
Update : 2025-02-17 Size : 6kb Publisher : zhulyan580086
[VHDL-FPGA-Verilog] VerilogFPGAUSB DL : 0: 用Verilog（FPGA）实现USB源代码大家-Using Verilog (FPGA) source code we look to achieve USB
Update : 2025-02-17 Size : 150kb Publisher : yang
[VHDL-FPGA-Verilog] verilog-usb--protel-design DL : 1: 基于FPGA的usb2.0 ip核设计，所用的语言是verilog-FPGA-based usb2.0 ip core design, the language used is the verilog
Update : 2025-02-17 Size : 52kb Publisher : 唐明桂
[USB develop] module-usb DL : 0: usb verilog code for transmitter
Update : 2025-02-17 Size : 17kb Publisher : arun
[VHDL-FPGA-Verilog] USB DL : 0: USB控制器的VERILOG工程文件，工程为ISE的，可以编译通过，压箱底的东西了-USB controller VERILOG project file, works for the ISE, you can compile, pressure bottom of things
Update : 2025-02-17 Size : 153kb Publisher : mike
[VHDL-FPGA-Verilog] FPGA-usb-control DL : 0: USB 68013 通用固件和配套上位机程序以及下位机FPGA程序verilog 可实现USB高速通信-USB 68013 generic PC firmware and supporting procedures and lower computer USB FPGA program can achieve high-speed communications
Update : 2025-02-17 Size : 7.83mb Publisher :
[VHDL-FPGA-Verilog] usb DL : 0: USB的verilog IP模块，经过DesignCompiler综合验证-USB-verilog IP module, comprehensive verification through DesignCompiler
Update : 2025-02-17 Size : 56kb Publisher : sj
[USB develop] USB DL : 0: 此例程是基于FPGA的USB控制器实例，主要功能为通过FPGA芯片控制USB芯片，实现开发板和PC机之间的USB接口数据通信，来模拟一个硬件加密设备的功能。用Verilog语言实现。-This routine is an instance of the USB controller based on FPGA, the main function is to control USB chip by the FPGA chip, implement the USB interface for data communication between development board and the PC machine, to simulate a hardware encryption devices function. Using Verilog language.
Update : 2025-02-17 Size : 151kb Publisher : 张彦钦
[VHDL-FPGA-Verilog] USB_fpga DL : 0: FPGA与USB PHY芯片Cy7c68013A通信的程序，Verilog语言-FPGA and USB PHY chip Cy7c68013A communication procedures, Verilog language
Update : 2025-02-17 Size : 4.17mb Publisher : 路永轲
[VHDL-FPGA-Verilog] usb DL : 0: 本文包含了USB的verilog程序及测代码-This article contains a USB verilog code and testing procedures
Update : 2025-02-17 Size : 152kb Publisher : 钱红
[VHDL-FPGA-Verilog] fpga-usb-verilog-test DL : 0: 红色飓风开发板中USB测试源码部分，包含说明文档，FPGA的verilog代码，cy68013固件程序，上位机测试程序。实现USB回环测试，可作为usb开发的参考文件-Red hurricane development board of the USB test source code, including documentation, FPGA verilog code, cy68013 firmware program, PC test program. Realization of USB loopback test, which can be taken as reference to the development of USB file
Update : 2025-02-17 Size : 15.16mb Publisher : 贾程序
[VHDL-FPGA-Verilog] USB DL : 0: 实现FPGA与PC通信的USB2.0接口,采用verilog语言实现-Implementation of FPGA and PC communication USB2.0 interface, using Verilog language to achieve
Update : 2025-02-17 Size : 144kb Publisher : chi

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