Search - usb fp

Search - usb fp - List

[VHDL-FPGA-Verilog] USB_2-0_Host_IP_Core DL : 0: this come from alter ,you can look and find it on line about USB
Update : 2025-02-17 Size : 87kb Publisher : fff
[Software Engineering] USB_devide DL : 0: 利用最新的嵌入式开发工具EDK，在FPGA 中完成对PDIUSBD12 的硬件定制和固件编程，从而在FPGA 中实现U S B 控制器，并最终完成U S B 的枚举过程、驱动程序的开发和简单的应用。-Using the latest embedded development tools, EDK, in the FPGA completes its PDIUSBD12 custom hardware and firmware programming, in order to realize USB controller in the FPGA, and ultimately complete the USB enumeration process of driver development and simple应用.
Update : 2025-02-17 Size : 49kb Publisher : pengrong
[USB develop] USB DL : 0: fpga设计的usb接口源程序，欢迎指导-FPGA design usb interface source code, welcomed the guidance of
Update : 2025-02-17 Size : 137kb Publisher : 陈楠
[MiddleWare] fpga_fifo_0122_02 DL : 0: 可以在里面修改协议.主要是cmos---fpga--usb(68013a)中除68013a部分的程序-To amend the agreement in the inside. Mainly cmos-fpga usb (68013a), except part of the procedure 68013a
Update : 2025-02-17 Size : 2.21mb Publisher :
[USB develop] isp1362_g DL : 0: 网上收集的利用nios软核，使用isp1362芯片开发的u盘程序，有助于usb开发的理解和ufi协议的理解。已经验证，完全可用xp自带驱动。-Collected online using Nios soft-core, use isp1362 chip development process u disk, usb help develop the understanding and agreement ufi understanding. Has been verified, fully available to bring their own driver xp.
Update : 2025-02-17 Size : 15kb Publisher : manual
[VHDL-FPGA-Verilog] USB DL : 0: 用VHDL实现的USB IP核，大家可以参考下-Use VHDL to achieve USB IP core, we can refer to the following
Update : 2025-02-17 Size : 1.09mb Publisher : 蔡飞
[VHDL-FPGA-Verilog] usb_FPGA DL : 0: 实现USB接口功能的VHDL和verilog完整源代码-Implementation USB interface functions of the VHDL and Verilog source code integrity
Update : 2025-02-17 Size : 254kb Publisher : liang
[SCM] GPIF_fifo DL : 0: EZ USB GPIF的控制器的源代码，已经调试通过-EZ USB GPIF the source code of the controller has passed testing
Update : 2025-02-17 Size : 328kb Publisher : 刘青
[Other] 68013 DL : 0: 介绍了此控制器与FPGA接口的控制和HDL (硬件描述语言)实现方法。利用CY7C68013控制器的 Slave F IFO从机方式,用Verilog HDL在FPGA中产生相应的控制信号,实现对数据的快速读写。试验结果表明此方案传输速度快、数据准确,可扩展到其他需要通过USB进行快速数据传输的系统中-This paper describes the controller and the FPGA interface to control and HDL (hardware description language) implementations. Use CY7C68013 controller Slave F IFO slave mode, using Verilog HDL in the FPGA generate a corresponding control signal to achieve fast read and write data. The results show that this program transmission speed, accurate data can be expanded to other needs through the USB for fast data transfer system
Update : 2025-02-17 Size : 357kb Publisher : 余岳衡
[Other] 6713_FPGA DL : 0: DSP+FPGA+USB2.0板子电路图 DSP是6713；FPGA是XilinxXC2S200；USB芯片是CY68013A-128AXC-DSP+ FPGA+ USB2.0 circuit board DSP is 6713 FPGA is XilinxXC2S200 USB chip is CY68013A-128AXC
Update : 2025-02-17 Size : 41kb Publisher : Hosea
[VHDL-FPGA-Verilog] FT2232H_USB_Core DL : 0: 在FPGA外扩用FT2232 实现UART TO USB 2.0 的通信。-The FT2232H is a USB2.0 Hi-Speed USB Device to FIFO IC. This core allows the use of this chip with an FGPA design in high speed FT245 style synchronous FIFO mode. Data rates up to 25 mbytes/s can be achieved. The core has internal FIFOs on the receive and transmit for improved throughput. For more information see FTDI s appnote "AN_130_FT2232H_Used_In_FT245 Synchronous FIFO Mode.pdf" Included: VHDL core, NIOS test application, PC test application
Update : 2025-02-17 Size : 6kb Publisher : 李涛
[USB develop] rwma DL : 0: 3G中FP协议的DCH和RACH解码,写相应代码的可以做下参考,还是很有用的！()
Update : 2025-02-17 Size : 6kb Publisher : kffuq%5F738