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[VHDL-FPGA-Verilogusb11

Description: 基于verilog HDL的一个USB 1.1的IP 核,内有详细文档说明。-Verilog HDL based on a USB 1.1 of the IP core, which has detailed documentation.
Platform: | Size: 414720 | Author: 戴求淼 | Hits:

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