Search - usb2.0 in verilog

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[USB develop] USB2_chip DL : 0: USB2.0 chip的一部分verilog源码。opencore上下的，还比较好用:)-USB2.0 chip part of Verilog source. Opencore ish, but also better quality :)
Date : 2025-07-12 Size : 35kb User : 戴鹏
[Other] 2005_LinuxKernelDevelopment[2ED]_RobertLove DL : 0: The Linux kernel is one of the most interesting yet least understood open-source projects. It is also a basis for developing new kernel code. That is why Sams is excited to bring you the latest Linux kernel development information from a Novell insider in the second edition of Linux Kernel Development. This authoritative, practical guide will help you better understand the Linux kernel through updated coverage of all the major subsystems, new features associated with Linux 2.6 kernel and insider information on not-yet-released developments. You ll be able to take an in-depth look at Linux kernel from both a theoretical and an applied perspective as you cover a wide range of topics, including algorithms, system call interface, paging strategies and kernel synchronization. Get the top information right from the source in Linux Kernel Development. -The Linux kernel is one of the most interest ing yet least understood open-source projects . It is also a basis for developing new kernel cod e. That is why Sams is excited to bring you the lat est Linux kernel development information from a Novell insider in the second edition of Linux K ernel Development. This authoritative. practical guide will help you better understan d the Linux kernel through updated coverage of a ll the major subsystems, new features associated with a Linux 2.6 kernel nd insider information on not-yet-released de velopments. You'll be able to take an in-depth lo ok at Linux kernel from both a theoretical and an applied perspective as you cover a wide range of topics, including algorithms, system call interface. paging strategies and kernel synchronization . Get
Date : 2025-07-12 Size : 1.27mb User : 李中伟
[USB develop] usb_funct DL : 0: usb2.0的Verilog源代码,包含完整的源代码,没有测试激励文件-USB2.0 the Verilog source code, including complete source code, there is no incentive to test document
Date : 2025-07-12 Size : 208kb User : 高杰
[USB develop] usb20 DL : 0: 通用接口usb2.0的verilog开发代码-Common interface usb2.0 development of the verilog code
Date : 2025-07-12 Size : 201kb User : wx
[VHDL-FPGA-Verilog] VERILOG-USB2.0IP-core DL : 0: 完整的用VERILOG语言开发的USB2.0 IP核源代码，包括文档、仿真文件-VERILOG language with a complete development of USB2.0 IP core source code, including files, simulation files
Date : 2025-07-12 Size : 215kb User : king