Description: This a CY7C68013 (USB2.0 Chip) Configuration example for Slave FIFO Mode with Sync Signal. Platform: |
Size: 122340 |
Author:MyName |
Hits:
Description: This an USB2.0 chip CY7C68013 Configuraion Example for Slave FIFO mode with \"async\" mode. Platform: |
Size: 124594 |
Author:MyName |
Hits:
Description: This a CY7C68013 (USB2.0 Chip) Configuration example for Slave FIFO Mode with Sync Signal. Platform: |
Size: 121856 |
Author:MyName |
Hits:
Description: This an USB2.0 chip CY7C68013 Configuraion Example for Slave FIFO mode with "async" mode. Platform: |
Size: 123904 |
Author:MyName |
Hits:
Description: 用FPGA做USB2.0通信的实验,完成SLAVE FIFO模式下的数据传输,里面包括固件程序,还有上位机(C++)程序。-USB2.0 communication with the FPGA to do the experiment, complete the SLAVE FIFO mode data transmission, which includes firmware, and PC (C++) program. Platform: |
Size: 3322880 |
Author:王金凤 |
Hits:
Description: USB2.0上位机的驱动程序,由C++编写,可用于Slave FiFO模式下。-The the USB2.0 host computer drivers by C++ preparation, can be used to the Slave FiFO mode. Platform: |
Size: 58368 |
Author:冯沛隆 |
Hits: