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Description: 数字频率合成器芯片AD9852
的配置文件,HDL级的Verilog代码
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Size: 1728 |
Author: 李春阳 |
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Description: 数字频率合成器芯片AD9852
的配置文件,HDL级的Verilog代码-DDS chip AD9852 profile, HDL-level Verilog code
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Size: 1024 |
Author: 李春阳 |
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Description: AD9852,DDS芯片接收数据逻辑。(Verilog语言)-AD9852, DDS chips receive data logic. (Verilog language)
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Size: 1024 |
Author: zhangwei |
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