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Description: 用verilog硬件描述语言编写的16位数模转换器的源代码,可以综合-with verilog hardware description language of 16 Digital to Analog source code can be integrated
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Size: 1024 |
Author: awp |
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Description: 许多非常有用的 Verilog 实例: ADC, FIFO, ADDER, MULTIPLIER 等-many very useful Verilog examples : ADC, FIFO, ADDER, MULTIPLIER etc.
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Size: 188416 |
Author: 张驰 |
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Description: 编写verilog代码
利用实验箱上的A/D芯片完成模数转换。输入电压由实验箱提供,其幅值在0~5V间变化,由电位器控制。输出信号显示输入的模拟电压值,由数码管显示为2位BCD码的形式。-The preparation of Verilog code box on the use of experimental A/D chip to complete analog-digital conversion. Input voltage provided by the experimental box, and its amplitude in the 0 ~ 5V between changes in control by potentiometer. Output signal shows that the value of analog voltage input from a digital display for two BCD code of the form.
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Size: 22528 |
Author: Ericwhu |
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Description: 模数转换器AD976采样控制器程序Verilog实现,基于状态机实现-AD976 ADC sampling procedures Verilog realize the controller, based on the state machine to achieve
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Size: 180224 |
Author: cj |
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Description: 用verilog编程实现的基于FPGA的AD数据采集程序-Verilog Programming with FPGA-based data collection procedures AD
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Size: 499712 |
Author: 张西贝 |
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Description: adc verilog
用verilog编写的sigma-delta adc例子
应用在计量类adc产品-adc verilog Verilog prepared using sigma-delta adc examples used in the measurement adc Product category
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Size: 3072 |
Author: 张鸿 |
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Description: 此程序为Verilog控制ADC的全部程序,已检验可以应用-This procedure for the Verilog control ADC all procedures can be applied to test
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Size: 140288 |
Author: Johonson |
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Description: it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit. -it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.
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Size: 6144 |
Author: yasir ateeq |
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Description: FPGA控制AD程序,ADC,DAC转换接口.rar 有限状态机控制AD采样.rar-FPGA control AD procedure
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Size: 269312 |
Author: 黄群 |
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Description: 运行在FPGA上的Verilog程序(实现对ADC的控制)-Verilog procedures (the achievement of the control of the ADC)
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Size: 320512 |
Author: lion |
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Description: verilog code for ADC
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Size: 1024 |
Author: nhat |
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Description: 用verilog实现,ADC控制,源代码,可进行仿真-Verilog with the realization of, ADC control, source code, can be simulated
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Size: 139264 |
Author: 代鑫 |
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Description: Complete Verilog-A library for analog blocks, like ADC, DAC, amplifiers
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Size: 80896 |
Author: zhanglh |
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Description: ADC测试的verilog代码,可以下载到FPGA上面实现对ADC性能测试。-the test code for ADC of verilog
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Size: 145408 |
Author: 刘晓志 |
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Description: ADC control in VHDL language.
Spartan 3E starter pack
ISE 10.1
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Size: 203776 |
Author: khoosram |
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Description: verilog实现的16位模数转换器参考源代码-verilog to achieve 16-bit ADC reference source code
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Size: 1024 |
Author: 龚俊杰 |
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Description: a verilog code about dac of audio codec on fpga board.
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Size: 1024 |
Author: DCLAB |
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Description: verilog adc0809控制器FPGA实现,编译通过,系统时钟分频,满足ADC时钟要求。-verilog adc0809 controller FPGA, compiler, system clock frequency to meet the requirements of ADC clock.
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Size: 344064 |
Author: luo |
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Description: 设计ADC控制器,Verilog代码.利用有限状态机设计方法在FPGA上设计ADC0809的接口控制器,采样结果送到数码管显示出来。-ADC controller design, Verilog code using finite state machine design in the FPGA design ADC0809 interface controller, the sampling results to the digital display.
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Size: 3072 |
Author: 钟雪美 |
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Description: xilinx verilog FPGA驱动AD9613 数据采集DEMO程序(Xilinx Verilog FPGA drives AD9613 data acquisition DEMO program.)
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Size: 793600 |
Author: amzhy8 |
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