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[Embeded-SCM Develop] verilog实例 [43项]

Description: 嵌入式可编程器件CPLD的典型实例 压缩包，共计43个源码文件。 使用ALTERA的 Muxplus 软件即可编辑仿真 相关软件可在教育网ftp下载[天网查询，有很多站点提供]-Embedded Programmable CPLD in a typical example of compressed, for a total of 43 source document. Altera Muxplus use the software can edit simulation software available from the Education Network ftp download [days Web inquiries, many sites provide]
Platform: | Size: 181248 | Author: 吴旭辉 | Hits:

[VHDL-FPGA-Verilog] sopc

Description: altera推出的基于它们fpga和cpld的构建嵌入式系统的新技术sopc的介绍。其集成在quartus II中-ALTERA due to launch them and they simply cpld Construction of the new Embedded System Technology sopc briefing. Its integrated into the Quartus II
Platform: | Size: 8863744 | Author: 刘吉 | Hits:

[VHDL-FPGA-Verilog] I2C总线控制器 altera提供-VHDL

Description: I2C总线控制器 altera提供的VHDL的源程序代码-I2C Bus Controller ALTERA the VHDL source code
Platform: | Size: 1639424 | Author: 陈旭 | Hits:

[VHDL-FPGA-Verilog] verilog-som

Description: 拿verilog编写的som(自适应神经网络算法)，用于障碍物检测，基于FPGA可综合实验，已经在altera的cylcone上实现-Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone
Platform: | Size: 5120 | Author: 刘索山 | Hits:

[Other] Altera-FPGA-Guide

Description: Altera FPGA 的开发工具的详细教程，有例程与步奏-Altera FPGA development tools detailed guidance, routines and step-outs
Platform: | Size: 685056 | Author: yxc | Hits:

[VHDL-FPGA-Verilog] ccd-in-verilog

Description: ALTERA关于CCD的一些verilog程序，都通过运行无误的。-ALTERA on a number of Verilog CCD procedures, both by running unmistakable.
Platform: | Size: 14336 | Author: 邹振兴 | Hits:

[Home Personal application] digtalclk

Description: 用Altera公司的QuartusII编写的电子钟程序，可以下载至开发板，实现一个智能数字钟功能，计时，校时，闹钟，跑表等功能，也可用于学习verilog HDL语言与数字逻辑-Using Altera s QuartusII procedures for the preparation of electronic bell, you can download to a development board, the realization of an intelligent digital clock function, time, school time, alarm clock, stopwatch functions can also be used to study verilog HDL language and digital logic
Platform: | Size: 2094080 | Author: 张欢 | Hits:

[Embeded-SCM Develop] I2C_Controller

Description: I2C controller verilog code for altera fpga platform.
Platform: | Size: 1024 | Author: 蔡俊仪 | Hits:

[VHDL-FPGA-Verilog] diff_io_top

Description: LVDS的应用的Verilog HDL例子程序，由altera公司提供。-LVDS Application of Verilog HDL examples of procedures provided by the altera.
Platform: | Size: 527360 | Author: wangyunshann | Hits:

[VHDL-FPGA-Verilog] huawei_logic_Design

Description: FPGA逻辑设计，vhdl/verilog altera/xilinx 介绍-FPGA logic design, vhdl/verilog altera/xilinx Introduction
Platform: | Size: 2041856 | Author: zhang | Hits:

[VHDL-FPGA-Verilog] Traffic

Description: 使用ALTERA上DE2平台，使用Verilog描述，交通灯控制。-Using ALTERA on DE2 platform, use the Verilog description of the traffic light control.
Platform: | Size: 263168 | Author: 徐朝凯 | Hits:

[Other] UnsignMulti

Description: ALTERA上DE2平台，verilog描述，无符号乘法器，在数码管显示结果。-ALTERA on DE2 platform, verilog description unsigned multiplier, the result will be displayed in the digital pipe.
Platform: | Size: 878592 | Author: 徐朝凯 | Hits:

[VHDL-FPGA-Verilog] ref-sdr-sdram-verilog

Description: 标准SRD SDRAM控制器参考设计，altera提供 Verilog代码,带有使用手册，大家试试交流一下 -Standard SRD SDRAM controller reference design, altera provide Verilog code, with user manual, we try to exchange some
Platform: | Size: 776192 | Author: 费尔德 | Hits:

[VHDL-FPGA-Verilog] VDHL

Description: Verilog的135个经典设计实例，直流电机控制，游戏机，三态总线，加法器，锁存器等-Verilog s 135 classic design example, DC motor control, video game consoles, three-state bus, adder, latches, etc.
Platform: | Size: 113664 | Author: 何柳 | Hits:

[VHDL-FPGA-Verilog] Verilog

Description: altera公司推荐的verilog代码风格教程-altera recommended verilog code style tutorial
Platform: | Size: 1849344 | Author: blur | Hits:

[VHDL-FPGA-Verilog] altera_fft

Description: alter官方fft程序 使用verilog编写 需要的同学可以下载-alter the official fft program uses verilog prepared students in need can be downloaded
Platform: | Size: 989184 | Author: 廖国杰 | Hits:

[VHDL-FPGA-Verilog] URAT_VHDL_CODE

Description: altera公司的fpga源代码，用VHDL编写的uart程序。-altera' s fpga source code, uart program written using VHDL.
Platform: | Size: 32768 | Author: 张东 | Hits:

[Other] lcd2tft

Description: convert lcd 4 bits to tft 16 bits.Writen verilog,Altera Quartus.
Platform: | Size: 816128 | Author: ulsonic | Hits:

[VHDL-FPGA-Verilog] FPGA-verilog

Description: 用Verilog语言编写的一些简单的FPGA入门实验，用ALTERA DE2开发板和Quartus_II软件开发环境。包括：流水灯实验、数码管显示实验-With Verilog language preparation some simple introduction experiment, with FPGA ALTERA DE2 development board and Quartus_II software development environment. Include water lamp experiment, digital pipe display experimentation, etc
Platform: | Size: 10240 | Author: 星光依旧 | Hits:

[VHDL-FPGA-Verilog] Verilog-Design

Description: 包括三个文档: 1.基于Altera Quartus II 的模块化设计应用 2.基于Xilinx ISE的的模块化设计示例 3.模块化设计方法的设计流程-Consists of three documents: 1. Based on Altera Quartus II modular design applications 2. Xilinx ISE based on the modular design of Example 3. Modular Design for design process
Platform: | Size: 252928 | Author: Joseph | Hits:
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