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[Other resource] Verilog_Development_Board_Sources

Description: 朋友，我是Jawen.看到先前上载的一套CPLD开发板的VHDL源码挺受欢迎的，现在就将她的Verilog源码也一并贡献给大家：8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟-friends, I Jawen. previously seen on the set of CPLD Development Board VHDL source code quite welcome, Now she will also be Verilog source contribution to everyone : eight priority encoder, multipliers, Multi-channel selector, binary to BCD, adder, subtraction device, the simple state machine, four comparators, 7 of the digital control, i2c bus, lcd LCD allocated code switches, serial port, the buzzer sounded, matrix keyboards, Bomadeng. Traffic lights, digital clock
Platform: | Size: 3152400 | Author: Jawen | Hits:

[VHDL-FPGA-Verilog] Verilog_Development_Board_Sources

Description: 朋友，我是Jawen.看到先前上载的一套CPLD开发板的VHDL源码挺受欢迎的，现在就将她的Verilog源码也一并贡献给大家：8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟-friends, I Jawen. previously seen on the set of CPLD Development Board VHDL source code quite welcome, Now she will also be Verilog source contribution to everyone : eight priority encoder, multipliers, Multi-channel selector, binary to BCD, adder, subtraction device, the simple state machine, four comparators, 7 of the digital control, i2c bus, lcd LCD allocated code switches, serial port, the buzzer sounded, matrix keyboards, Bomadeng. Traffic lights, digital clock
Platform: | Size: 3151872 | Author: Jawen | Hits:

[VHDL-FPGA-Verilog] Binary_to_BCD_Converter

Description: General Binary-to-BCD Converter The linked code is a general binary-to-BCD Verilog module, and I have personally tested the code.
Platform: | Size: 25600 | Author: volkan | Hits:

[VHDL-FPGA-Verilog] Bin2Grey

Description: 一个用Verilog语言实现的二进制码到BCD码的一种转换方法的实现。包含工程文件和实现文档。-Verilog language implementation with a binary code to BCD code conversion method as a realization. And the achievement of the document contains the project file.
Platform: | Size: 82944 | Author: 文闯 | Hits:

[VHDL-FPGA-Verilog] Binary_to_BCD_Converter

Description: This is a binary to BCD convert designed by using the “shift and add-3 algorithm”. The verilog code of basic cell add-3 is also included in this file.
Platform: | Size: 9216 | Author: WPI | Hits:

[VHDL-FPGA-Verilog] Lab8_binbcd4

Description: 4位二进制-BCD码转换器的设计与实现.4位二进制-BCD码转换器的真值表，本实验中用Verilog语句来描述。-Design of 4 bit-BCD converter and implementation of.4 binary-BCD code converter truth table, use the Verilog statement in this experiment to describe.
Platform: | Size: 169984 | Author: penglx1803 | Hits:

[assembly language] Verilog源代码

Description: 多种基本功能的Verilog代码实现，包括多路选择器，二进制到BCD码转换，二进制到格雷码转换，7段译码器，8位数据锁存器，移位寄存器等等多种功能。(Verilog code implementation of a variety of basic functions, including multiplexer, binary to BCD code conversion, binary to Gray code conversion, 7-segment decoder, 8-bit data latch, shift register and many other functions.)
Platform: | Size: 18432 | Author: MMK1 | Hits:

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