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[Other resource] ad_DCT

Description: verilog 编程 有测试文档 基于查表结构实现 离散余弦变换dct 来源：opencores -Verilog Programming is based on the test documents Lookup structure for a discrete cosine transform Extra Source : opencores
Platform: | Size: 33663 | Author: 周信均 | Hits:

[VHDL-FPGA-Verilog] ad_DCT

Description: verilog 编程 有测试文档 基于查表结构实现 离散余弦变换dct 来源：opencores -Verilog Programming is based on the test documents Lookup structure for a discrete cosine transform Extra Source : opencores
Platform: | Size: 33792 | Author: 周信均 | Hits:

[Graph program] DCT-vhdl

Description: 这是一个二维 8*8块的离散余弦变换(DCT)以及反变换(IDCT)算法,采用VHDL实现-This is a two-dimensional 8* 8 discrete cosine transform (DCT) and inverse transform (IDCT) algorithms using VHDL realize
Platform: | Size: 10240 | Author: liujl | Hits:

[VHDL-FPGA-Verilog] dct

Description: 离散余弦变换的verilog源代码，经过验证可实现-Discrete cosine transform of Verilog source code can be verified
Platform: | Size: 27648 | Author: 罗伟 | Hits:

[Multimedia program] dct

Description: Mpeg2视频压缩时进行空间压缩时的离散余弦变换矩阵的verilog实现，采用modelsim验证-Mpeg2 video compression when space compression of discrete cosine transform matrix realize Verilog using ModelSim verification
Platform: | Size: 29696 | Author: mayang | Hits:

[OpenGL program] DCT

Description: 用Verilog HDL编写的离散余弦变换，可用于视频图像压缩，并在modelsim SE6.0中仿真通过-Verilog HDL prepared with discrete cosine transform can be used for video image compression, and modelsim SE6.0 simulation through
Platform: | Size: 1024 | Author: yangyanwen | Hits:

[VHDL-FPGA-Verilog] dctub11

Description: 离散余弦变换的变换单元模块，verilog语言实现，并通过功能仿真-Discrete Cosine Transform transform modules, verilog language, and through functional simulation
Platform: | Size: 1024 | Author: zsb | Hits:

[VHDL-FPGA-Verilog] DCT_IDCT

Description: 离散余弦变换及反离散余弦变换的HDL代码及测试文件。包括VHDL及Verilog版本。可用途JPEG及MEPG压缩算法。-Discrete cosine transform and inverse discrete cosine transform of the HDL code and test files. Including VHDL and Verilog versions. And MEPG can use JPEG compression algorithm.
Platform: | Size: 29696 | Author: caesar | Hits:

[VHDL-FPGA-Verilog] two_d_dct_serial

Description: Verilog codes for 2D Discrete Cosine Transform (DCT)
Platform: | Size: 37888 | Author: rajkumar | Hits:

[VHDL-FPGA-Verilog] DCT_IDCT

Description: H264/AVS中的离散余弦变换DCT以及反离散余弦变换IDCT的Verilog代码-H264/AVS the discrete cosine transform and inverse discrete cosine transform DCT IDCT of Verilog code
Platform: | Size: 28672 | Author: 李柏祥 | Hits:

[VHDL-FPGA-Verilog] huffmandecoder

Description: 采用verilog实现反离散余弦变换的程序-The function of realizating Inverse discrete cosine transform
Platform: | Size: 5120 | Author: huangqiunan | Hits:

[File Format] dct_verilog

Description: Implementation of one dimensional Discrete cosine transform using verilog for FPGA implementation
Platform: | Size: 7168 | Author: Googlyeyes | Hits:

[VHDL-FPGA-Verilog] DDDCCT_IDCTi

Description: 离散余弦变换及反离散余弦变换的HDL代码及测试文件。包含VHDL及及Verilog版本。可用途JPEG及MEPG压缩算法 已通过测试。 -The discrete cosine transform and inverse discrete cosine transform HDL code and test files. Contains VHDL and Verilog versions. Can use JPEG and MEPG compression of algorithm has been tested.
Platform: | Size: 30720 | Author: | Hits:

[VHDL-FPGA-Verilog] binDCT

Description: 一种快速离散余弦变换硬件实现，对于初学者很有用-A fast discrete cosine transform implementation by using verilog
Platform: | Size: 1024 | Author: xiaodonghu | Hits:

[Graph program] DCT

Description: 用Verilog HDL编写的离散余弦变换，可用于视频图像压缩，并在modelsim SE6.0中仿真通过-Verilog HDL prepared with discrete cosine transform can be used for video image compression, and modelsim SE6.0 simulation through
Platform: | Size: 1024 | Author: shi17395 | Hits:

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