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[VHDL-FPGA-Verilog] I2S

Description: 这是一个I2S接口的VHDL实现源代码，I2S是一个通用的音频接口。-This is a I2S interface VHDL source code, I2S is a generic audio interface.
Platform: | Size: 1583104 | Author: 孙浩 | Hits:

[VHDL-FPGA-Verilog] FPGA-based-DAC

Description: 用fpga实现的DA转换器，有说明和源码，VDHL文件。 A PLD Based Delta-Sigma DAC Delta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinary performance and low cost of today s audio CD players. The simplest Delta-Sigma DAC consists of a Delta-Sigma modulator and a one bit DAC. Since, both of these components can be realized using digital circuits, it is possible to implement a low precision Delta-Sigma DAC using a PLD.-Using FPGA to achieve the DA converter, has descriptions and source code, VDHL document. A PLD Based Delta-Sigma DACDelta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinaryperformance and low cost of today s audio CDplayers. The simplest Delta-Sigma DAC consists of aDelta-Sigma modulator and a one bit DAC. Since , both of these components can be realized usingdigital circuits, it is possible to implement a lowprecision Delta-Sigma DAC using a PLD.
Platform: | Size: 58368 | Author: 开心 | Hits:

[VHDL-FPGA-Verilog] S12_AudioLoopback_DAV_MIC

Description: 从MIC输入一段音频然后，再从AOUT的接口播放出来的verilog 的代码-Input from the MIC for some audio and then AOUT interface from broadcast in the Verilog code
Platform: | Size: 2413568 | Author: zl.yin | Hits:

[Audio program] EchoClear

Description: vc++源码，消除回声处理， 可用于音频处理； -vc++ source code, deal with the elimination of echo can be used for audio processing
Platform: | Size: 917504 | Author: toven | Hits:

[VHDL-FPGA-Verilog] DecoderAudio

Description: 本程序为SDI的音视频分离Verilog程序，信号通过分离后，可以分离出视频和音频信号。-This procedure for the separation of SDI audio and video Verilog program, the signal after the separation, can be isolated video and audio signals.
Platform: | Size: 2048 | Author: 邢占鹏 | Hits:

[Embeded-SCM Develop] NIOS_i2sound_demo

Description: 在nios系统开发中的驱动i2c音频电路的代码,包括verilog代码,与相应的驱动代码-In the nios system development in the driver i2c code for the audio circuitry, including the verilog code, and the corresponding driver code
Platform: | Size: 55296 | Author: chd | Hits:

[VHDL-FPGA-Verilog] ADC

Description: a verilog code about dac of audio codec on fpga board.
Platform: | Size: 1024 | Author: DCLAB | Hits:

[VHDL-FPGA-Verilog] DAC

Description: a verilog code about dac of audio codec on fpga board.
Platform: | Size: 1024 | Author: DCLAB | Hits:

[Audio program] ANC_LMS

Description: verilog描述的基于LMS的自适应噪声消除器ANC算法。用于数字音频处理。-The verilog Description LMS-based adaptive noise canceller ANC algorithm. For digital audio processing.
Platform: | Size: 3072 | Author: Solomon | Hits:

[VHDL-FPGA-Verilog] AD_FIFO

Description: 简单的Verilog程序，针对音频实验板的AD到DA调通试验，下载执行前请按照自己试验环境更改设置-Simple Verilog program for test the AD to DA loop of universal audio test platform. Please configure it according to the test environment before download and implement the program to FPGA
Platform: | Size: 3955712 | Author: ZHU XIANGYU | Hits:

[Other] Spdif_out

Description: S/PDIF Audio output example for FPGA (in Verilog)
Platform: | Size: 189440 | Author: OzOnE | Hits:

[VHDL-FPGA-Verilog] DE1-verilog

Description: Altera公司推出最新开发板DE1。该资料为DE1的FPGA 代码，包括ADC，音频处理，视频输出等，供大家参考使用。-Altera Corporation introduced the latest development board DE1. The data for the DE1 FPGA code, including the ADC, audio processing, video output, etc., for your use and reference.
Platform: | Size: 11901952 | Author: 小陈 | Hits:

[VHDL-FPGA-Verilog] audioloopback

Description: Verilog program for running a audio loopback system for AC97 codec.
Platform: | Size: 3072 | Author: Nitesh | Hits:

[VHDL-FPGA-Verilog] DE1_SoC_Audio

Description: 声音录制、播放的Verilog代码，用于Altera Cyclone V SOC. 写时适配的是DE1-SOC开发板。-Audio recording and playing code for Altera Cyclone V SOC FPGA. Code was designed for DE1-SOC development board, but could be reference for other boards.
Platform: | Size: 3407872 | Author: 比鼻 | Hits:

[Other] si3000

Description: Verilog code for control ICs SI3000 audio coder on FPGA
Platform: | Size: 2048 | Author: tranchi | Hits:

[VHDL-FPGA-Verilog] Nexys4FFTDemo-master

Description: A simple Verilog example of a 4096pt FFT on analog input from a Nexys 4 XADC. The input is sampled at 1MSPS, oversampled to produce 14-bit samples at 62.5kHz, then sent to the FFT processing modules and passed through to PWM Audio out. The FFT outputs the magnitude for each frequency bin and a histogram of the frequency spectrum is output over VGA video
Platform: | Size: 181248 | Author: jason912 | Hits:

[VHDL-FPGA-Verilog] Audio_whistle_suppressor

Description: 探讨了一种数字移频法啸叫检测与抑制音频功率放大实验测试系统设计方案，用来实现带啸叫检测与抑制音频功率放大．系统以 FPGA 为控制核心(This paper has designed a testing system for an audio power amplifier with howling detection and suppression which is used to achieve howling detection and suppression audio power amplifier.The system takes FPGA as the control core and realizes howling supperssion through digital frequency)
Platform: | Size: 20501504 | Author: Justin小强子 | Hits:

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