Search - verilog game

[VHDL-FPGA-Verilog] PINPAN

Description: 乒乓游戏，led流水灯控制乒乓球，按键控制甲方已方操作。详细说明看readme-ping-pong game, led lights to control water table tennis, has been chosen to control keys to operate. Details see readme
Platform: | Size: 4096 | Author: 张建 | Hits:

[VHDL-FPGA-Verilog] bahe

Description: 设计四拔河游戏机 1、设计一个能进行拔河游戏的电路。 2、电路使用15个(或9个)发光二极管，开机后只有中间一个发亮，此即拔河的中心点。 3、游戏双方各持一个按钮，迅速地、不断地按动，产生脉冲，谁按得快，亮点就向谁的方向移动，每按一次，亮点移动一次。 4、亮点移到任一方终端二极管时，这一方就获胜，此时双方按钮均无作用，输出保持，只有复位后才使亮点恢复到中心。 5、用数码管显示获胜者的盘数。教学提示: 1、按钮信号即输入的脉冲信号，每按一次按钮都应能进行有效的计数。 2、用可逆计数器的加、减计数输入端分别接受两路脉冲信号，可逆计数器原始输出状态为0000，经译码器输出，使中间一只二极管发亮。 3、当计数器进行加法计数时，亮点向右移；进行减法计数时，亮点向左移。 4、由一个控制电路指示谁胜谁负，当亮点移到任一方终端时，由控制电路产生一个信号，使计数器停止计数。 5、将双方终端二极管“点亮”信号分别接两个计数器的“使能”端，当一方取胜时，相应的计数器进行一次计数，这样得到双方取胜次数的显示。 6、设置一个“复位”按钮，使亮点回到中心，取胜计数器也要设置一个“复位”按钮，使之能清零。 -design a tug-of-war game, can design a game of tug of war circuit. 2, circuit use 15 (or 9), light-emitting diodes, come only among a shiny, namely, the center of tug-of-war. 3, the game with a two button rapidly and continuously pressed, have a pulse, who by fast, Who bright spots on the move, every time, a bright spot in Mobile. 4, the party moved to highlight terminal diode, on the winning side, this time the two sides had no effect buttons, to maintain output, so after only bright spot reduction restored to the center. 5, digital Display won the bookkeeping. Teaching Tip : one, that the button signal input pulse signal every time the button should be able to effectively counter. 2, with reversible counter, plus or minus count input to receive two pulse signal, reversible counter to the
Platform: | Size: 292864 | Author: 万金油 | Hits:

[VHDL-FPGA-Verilog] sc

Description: 用verilog编写的乒乓球游戏，内带ps2，VGA驱动，下载到spantan3开发板上即可使用（原创）-Prepared using Verilog table tennis game, with band ps2, VGA driver, download to spantan3 development board to use (original)
Platform: | Size: 460800 | Author: frank | Hits:

[Other Embeded program] Timer_basketball

Description:
Platform: | Size: 1024 | Author: zhangyanbo | Hits:

[assembly language] pong

Description: vga verilog codes which design a pong game and output to vga monitor
Platform: | Size: 1024 | Author: 蔡俊仪 | Hits:

[VHDL-FPGA-Verilog] LDPC_Encoder_Verilog

Description: Verilog语言编写的LDPC编码程序-Verilog languages LDPC coding procedures
Platform: | Size: 9216 | Author: 陈楚龙 | Hits:

[VHDL-FPGA-Verilog] Cursor

Description: ALTERA的DE2平台VGA接口应用，由KEY0－KEY3控制上下左右，使屏幕上光标移动，由Verilog描述。-ALTERA the DE2 platform VGA interface applications, from top to bottom KEY0-KEY3 about control, so that the screen cursor by the Verilog description.
Platform: | Size: 779264 | Author: 徐朝凯 | Hits:

[VHDL-FPGA-Verilog] VDHL

Description: Verilog的135个经典设计实例，直流电机控制，游戏机，三态总线，加法器，锁存器等-Verilog s 135 classic design example, DC motor control, video game consoles, three-state bus, adder, latches, etc.
Platform: | Size: 113664 | Author: 何柳 | Hits:

[Embeded-SCM Develop] Tug-of-war-game

Description: 拔河游戏机制作的原理图PCB原理图。数字逻辑电路。-Tug-of-war game produced by PCB schematic schematic. Digital logic circuits.
Platform: | Size: 78848 | Author: 果冻 | Hits:

[VHDL-FPGA-Verilog] DE2_NIOS_HOST_MOUSE_VGA

Description: 在DE2开发板上实现的VGA输出游戏。硬件用Verilog语言编写，在Quartus上编译；软件用C语言编写，在Nios2上编译运行。把DE2板和显示器键盘连起来即可使用。-Development in the DE2 board game to achieve the VGA output. Hardware using Verilog language, compiled in the Quartus software with C language, compiled to run in Nios2. The DE2 board and display can be used to connect the keyboard.
Platform: | Size: 1627136 | Author: 符玉襄 | Hits:

[VHDL-FPGA-Verilog] BALANCEBALL-Finale

Description: 重力感应小球游戏，基于FPGA平台，Verilog语言，VGA输出。-Gravity sensing ball game, based on FPGA platform, Verilog language, VGA output.
Platform: | Size: 11012096 | Author: 朱澄澄 | Hits:

[VHDL-FPGA-Verilog] Temp2

Description: dice game in verilog
Platform: | Size: 4096 | Author: harini | Hits:

[VHDL-FPGA-Verilog] vga_game

Description: 用Verilog写的小游戏，俄罗斯方块,在VGA上实现游戏功能-Verilog game
Platform: | Size: 8686592 | Author: 端木微雨 | Hits:

[VHDL-FPGA-Verilog] Greedy_Snake_verilog

Description: 基于FPGA的verilog代码，在Spartan3开发板上实现了传统贪吃蛇的游戏，通过VGA显示在屏幕上。按键控制方向。-This is a FPGA project, which used verilog and implemented the traditional game of Greedy Snake.
Platform: | Size: 7168 | Author: onioncc | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: 本文采用FPGA来模拟实际的乒乓球游戏。本设计是基于Altera 公司的FPGA Cyclone II 芯片EP2C35 的基础上实现，运用Verilog HDL 语言编程，Quartus II 软件上进行编译、仿真，最终在Altera 公司的DE2 开发板上成功实现下载和调试-In this paper, FPGA to simulate the actual tennis game. The design is based on Altera' s FPGA Cyclone II EP2C35 on the basis of the chip, using Verilog HDL language programming, Quartus II software to compile, simulation, and ultimately in the Altera DE2 development board and the company successfully download and debug
Platform: | Size: 183296 | Author: 李丽 | Hits:

[VHDL-FPGA-Verilog] pong

Description: Verilog code pong the game
Platform: | Size: 325632 | Author: ivan | Hits:

[VHDL-FPGA-Verilog] Proyecto2(Gato)

Description: Verilog, Gato Game, CAT game!, VGA
Platform: | Size: 841728 | Author: ivan | Hits:

[VHDL-FPGA-Verilog] Snake

Description: Verilog, Snake game, VGA, Keyboard
Platform: | Size: 2497536 | Author: ivan | Hits:

[VHDL-FPGA-Verilog] game

Description: （1）设计一个由甲、乙双方参赛，有裁判的 3 人乒乓球游戏机。（2）用 8 个(或更多个)LED 排成一条直线，以中点为界，两边各代表参赛双方的位置，其中一只点亮的 LED 指示球的当前位置，点亮的 LED 依此从左到右，或从右到左，其移动的速度应能调节。（3）当“球”(点亮的那只 LED)运动到某方的最后一位时，参赛者应能果断地按下位于自己一方的按钮开关，即表示启动球拍击球。若击中，则球向相反方向移动；若未击中，则对方得 1 分。（4）一方得分时，电路自动响铃 3s，这期间发球无效，等铃声停止后方能继续比赛。（5）设置自动记分电路，甲、乙双方各用两位数码管进行记分显示，每计满 21 分为 1 局。（6）甲、乙双方各设一个发光二极管，表示拥有发球权，每隔 5 次自动交换发球权，拥有发球权的一方发球才有效。(A table tennis game machine for 3 players with a referee and a B player is designed.)
Platform: | Size: 745472 | Author: heyu7892020 | Hits:

[Game Program] 贪吃蛇FPGA程序源码

Description: 贪吃蛇游戏，Verilog编写，希望对后面的人有帮助(Verilog snake game, wish this can help the future project-goers.)
Platform: | Size: 5644288 | Author: xzycsu1990 | Hits:

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