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[Other resource数字频率计实验报告

Description: 课程设计要求设计并用FPGA实现一个数字频率计,具体设计要求如下: 测量频率范围: 10Hz~100KHz 精度: ΔF / F ≤ ±2 % 系统外部时钟: 1024Hz 测量波形: 方波 Vp-p = 3~5 V 硬件设备:Altera Flex10K10 五位数码管 LED发光二极管 编程语言:Verilog HDL / VHDL-curriculum design and FPGA design to achieve a digital frequency meter, the specific design requirements are as follows : measurement frequency range : 10Hz to 100KHz precision : F / F 2% external clock system : 1024Hz Waveform Measurement : square Vp-p = 3 ~ 5 V hardware : Altera Flex10K10 five digital LED light emitting diode programming languages : Verilog HDL / VHDL
Platform: | Size: 144900 | Author: | Hits:

[VHDL-FPGA-Verilog数字频率计实验报告

Description: 课程设计要求设计并用FPGA实现一个数字频率计,具体设计要求如下: 测量频率范围: 10Hz~100KHz 精度: ΔF / F ≤ ±2 % 系统外部时钟: 1024Hz 测量波形: 方波 Vp-p = 3~5 V 硬件设备:Altera Flex10K10 五位数码管 LED发光二极管 编程语言:Verilog HDL / VHDL-curriculum design and FPGA design to achieve a digital frequency meter, the specific design requirements are as follows : measurement frequency range : 10Hz to 100KHz precision : F/F 2% external clock system : 1024Hz Waveform Measurement : square Vp-p = 3 ~ 5 V hardware : Altera Flex10K10 five digital LED light emitting diode programming languages : Verilog HDL/VHDL
Platform: | Size: 144384 | Author: | Hits:

[Embeded-SCM Developverilog_FPGA_DDC

Description: 这是一个用verilog HDL实现的实现数字下变频的源代码。-This is a verilog HDL used to achieve the realization of digital down conversion of the source code.
Platform: | Size: 2790400 | Author: 王坤 | Hits:

[VHDL-FPGA-VerilogVerilog-HDL

Description: 《北航常晓明Verilog应用》一书的pdf完整版,是学习Verilog的好书-" Beihang Chang Xiaoming Verilog Applications" pdf full version of the book is a good book to learn Verilog
Platform: | Size: 15432704 | Author: 甘福连 | Hits:

[VHDL-FPGA-VerilogPLL_50MHz_to_12MHz

Description: Verilog HDL语言编写EP2C8Q208芯片PLL分频的简单程序,50MHz分频为12MHz-Verilog HDL language,EP2C8Q208 chip, PLL frequency of simple procedures, 50MHz to 12MHz frequency
Platform: | Size: 53248 | Author: LM | Hits:

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