Search - verilog hdlc

[Other resource] hdlc

Description: 该工程是基于verilog hdl 语言编写的帧传输协议HDLC帧的发送端代码，会用QUATUSII的人都应该知道如何使用，希望能给你带来帮助-The project is based on the language verilog hdl frame transmission protocol HDLC frame of this generation - Codes will be used QUATUSII people should know how to use, in the hope of giving you helpful
Platform: | Size: 382986 | Author: 何丹萍 | Hits:

[SourceCode] HDLC设计代码

Description: verilog 设计的HDLC 链路逻辑
Platform: | Size: 4641 | Author: pp_zx@126.com | Hits:

[Other] dsu_test

Description: hdlc程序,对要求实现FPGA对HDLC的控制.-"procedures, requirements for FPGA HDLC control.
Platform: | Size: 3072 | Author: zhx | Hits:

[Documents] HDLCodingStyle

Description: verilog硬件描述语言编程规范，描述如何使你编写的代码的可读性更高，可用性更强，并且使你在编程过程中少犯一些低级错误。-Verilog hardware description language programming standard, and describe how you prepared to make the code more readable, more availability, and will enable you to the programming process less committed some minor errors.
Platform: | Size: 63488 | Author: | Hits:

[Com Port] HDLC_serial

Description: 这是一个将HDLC协议运用到串口通信的程序源码，很有参考价值，感兴趣的朋友可以讨论一下！-This is a use of HDLC protocol to the serial communication procedures source, was useful and interesting friends can discuss!
Platform: | Size: 727040 | Author: | Hits:

[VHDL-FPGA-Verilog] VerilogHDLchinapub

Description: Verilog HDL硬件描述语言 01简介.PDF 02HDL指南.PDF 03语言要素.PDF 04表达式.PDF 05门电平模型化.PDF 06用户定义原语.PDF 07数据流模型化.PDF 08行为建模.PDF 09结构建模.PDF 10其它论题.PDF 11验证.PDF 12建模实例.PDF 13语法参考.PDF-Verilog HDL Hardware Description Language Introduction 01. PDF 02HDL Guide. PDF 0 3 language elements. PDF 04 expressions. PDF 05-level modeling. PDF 06 user-defined primitives. P DF 07 data flow modeling. PDF 08 behavior modeling. PDF 09 modeling structure. PDF 10 other topics . PDF 11 certification. PDF 12 model. PDF 13 syntax reference. PDF
Platform: | Size: 4837376 | Author: 高 | Hits:

[VHDL-FPGA-Verilog] hdlc

Description: 该工程是基于verilog hdl 语言编写的帧传输协议HDLC帧的发送端代码，会用QUATUSII的人都应该知道如何使用，希望能给你带来帮助-The project is based on the language verilog hdl frame transmission protocol HDLC frame of this generation- Codes will be used QUATUSII people should know how to use, in the hope of giving you helpful
Platform: | Size: 382976 | Author: 何丹萍 | Hits:

[Books] hdlc_manual

Description: HDLC协议是目前广泛使用的电信协议。本文详细介绍使用方法。-HDLC protocol is widely used in telecommunications protocols. This paper describes the use of methods.
Platform: | Size: 555008 | Author: siweidong | Hits:

[VHDL-FPGA-Verilog] SPI_verilog_vhdl

Description: SPI串口的内核实现分verilog和HDLC实现-SPI serial kernel realize realize sub-Verilog and HDLC
Platform: | Size: 13312 | Author: qian | Hits:

[ARM-PowerPC-ColdFire-MIPS] crc16_8bit.v

Description: 利用verilog硬件描述语言编写的8为并行输入的常crc校验模块。hdlc子模块-Using Verilog hardware description language for the parallel importation of 8 regular CRC checksum module. HDLC sub-modules
Platform: | Size: 1024 | Author: 张纪强 | Hits:

[VHDL-FPGA-Verilog] hdlc_vhdl

Description: This a VHDL implementation of an HDLC controller
Platform: | Size: 180224 | Author: | Hits:

[VHDL-FPGA-Verilog] rece_7E

Description: HDLC控制接收数据开始标志7E和去零模块，用于FPGA与E1相接，Verilog HDL语言编写-HDLC control began to receive data to the zero mark 7E and modules for use in FPGA and E1 phase, Verilog HDL language
Platform: | Size: 2048 | Author: 刘彻 | Hits:

[Communication] crc_verilog

Description: HDLC控制协议中CRC校验码算法代码，为CRC16，Verilog语言-HDLC Control Protocol Code in the CRC checksum algorithm code for CRC16, Verilog language
Platform: | Size: 1024 | Author: 刘彻 | Hits:

[Other] hdlc_latest.tar

Description: HDLC在通讯设备中占有重要地位，本文件提供了完整正确的HDLC的硬件逻辑设计！对设计和学习都具有参考价值-HDLC in the communications equipment plays an important role, this document is to provide a complete hardware HDLC correct logic design! Design and learning have a reference value
Platform: | Size: 177152 | Author: 欧阳秋 | Hits:

[VHDL-FPGA-Verilog] HDLC_controller

Description: a verilog code for hdlc controller
Platform: | Size: 1024 | Author: meysam | Hits:

[VHDL-FPGA-Verilog] hdlc

Description: HDLC接口协议的FPGA实现使用verilog-design of HDLC
Platform: | Size: 3697664 | Author: hanjinchao | Hits:

[Com Port] HDLC

Description: hdlc设计，包括flag检测，插0、串并转换等设计，采用verilog编程。-hdlc design, using verilog
Platform: | Size: 5120 | Author: 何正文 | Hits:

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[Other resource] hdlc

[SourceCode] HDLC设计代码

[Other] dsu_test

[Documents] HDLCodingStyle

[Com Port] HDLC_serial

[VHDL-FPGA-Verilog] VerilogHDLchinapub

[VHDL-FPGA-Verilog] hdlc

[Books] hdlc_manual

[VHDL-FPGA-Verilog] SPI_verilog_vhdl

[ARM-PowerPC-ColdFire-MIPS] crc16_8bit.v

[VHDL-FPGA-Verilog] hdlc_vhdl

[VHDL-FPGA-Verilog] rece_7E

[Communication] crc_verilog

[Other] hdlc_latest.tar

[VHDL-FPGA-Verilog] HDLC_controller

[VHDL-FPGA-Verilog] hdlc

[Com Port] HDLC

[VHDL-FPGA-Verilog] hdlc

[VHDL-FPGA-Verilog] hdlc_decode

[VHDL-FPGA-Verilog] HDLC

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