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Description: Samsung 8G x 8 Bit NAND Flash Memory SPEC and verilog Simulatiom model
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Size: 1328527 |
Author: asd12321 |
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Description: 一个关于MEMORY设计的原代码,使用VERILOG编写的 希望对大家有些帮助-one of the original Memory design code prepared by the use of verilog we hope to help some
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Size: 26624 |
Author: 王平 |
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Description: 256Mbits (x8) 528 Bytes Page,
NAND Flash Memory
Verilog HDL Model User Manual
-256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual
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Size: 203776 |
Author: 陈强 |
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Description: 一个可以综合的Verilog 写的FIFO存储器
内附文档说明-a comprehensive Verilog can write FIFO memory attached document shows
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Size: 14336 |
Author: wutailiang |
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Description: RAM, Random-access memory,Verilog code-RAM, Random-access memory, Verilog code
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Size: 14336 |
Author: leigh lee |
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Description: verilog 写的 memory controller ,可以控制SDRAM SRAM NOR -written in Verilog memory controller, can control SDRAM SRAM NOR
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Size: 331776 |
Author: youjia |
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Description: 针对串行存储器M25P80应用的verilog程序-M25P80 serial memory for applications Verilog program
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Size: 356352 |
Author: wanghao |
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Description: Verilog写的内存控制器代码.
很好,很容易看懂-Verilog code to write the memory controller
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Size: 2048 |
Author: www |
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Description: 用verilog编写的驱动I2C接口的存储器pca9534的程序运行成功-Prepared using verilog memory-driven I2C interface of the program to run successfully pca9534
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Size: 352256 |
Author: 高天天 |
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Description: Verilog hdl code for representing ram and rom "memory" using many methods
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Size: 5120 |
Author: Muftah |
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Description: Example of a FIFO code in verilog language, to control a bus. With a memory stack and a testbench.
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Size: 846848 |
Author: Lokous |
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Description: I2c的Verilog描述,可以读取at24c512存储器-I2c the Verilog description can be read at24c512 memory
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Size: 834560 |
Author: 卢培 |
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Description: Sony - memory stick pro controller
(verilog)-Sony- memory stick pro controller
(verilog)
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Size: 912384 |
Author: curliph |
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Description: This single cycle 16-bit computer with testbenches written in Verilog.
It shows a result based on the instruction memory.
I also included documents about the structure of the single cycle computer-This is single cycle 16-bit computer with testbenches written in Verilog.
It shows a result based on the instruction memory.
I also included documents about the structure of the single cycle computer
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Size: 1375232 |
Author: my_watt |
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Description: 用ram存储顺序,用此方法也可以实现其他的顺序数据,代码用verilog编写-Ram memory with the order can be achieved using this method also the order of the other data, write code using verilog
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Size: 2048 |
Author: zhm |
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Description: memory controller design in verilog
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Size: 1593344 |
Author: arun |
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Description: 用verilog设计的存储器,可以读入数据,读出数据,是集成电路重要运用单元-Design with verilog memory that can be read into the data, read data is important IC with Cell
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Size: 158720 |
Author: 马顺 |
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Description: THIS FILE CONTAINS AROUND 20 USEFUL EXAMPLES ON SYSTEM VERILOG (MEMORY-ARRAYS,LOGICS,DATATYPES ETC.)-THIS FILE CONTAINS AROUND 20 USEFUL EXAMPLES ON SYSTEM VERILOG (MEMORY-ARRAYS,LOGICS,DATATYPES ETC.)
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Size: 3072 |
Author: ladu |
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Description: 用verilog在basys2开发板上实现一个具有置零、开始、暂停、记忆功能的秒表。(Implement a stopwatch which containing reset,pause,start,memory functions with the verilog on the vivado based on the basys2 development board.)
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Size: 637952 |
Author: terriao
|
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Description: memory生成结构说明文档;使用Verilog语言(Memory generated structure description document)
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Size: 356352 |
Author: zhaolinWang |
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