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[Other resourceNAND256R3A_VE1

Description: 256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual -256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual
Platform: | Size: 203769 | Author: 陈强 | Hits:

[Other resourcehdl

Description: 用Verilog语言编写的实现NAND Flash块的控制存取以及同步的FIFO的控制
Platform: | Size: 6481 | Author: 刘义春 | Hits:

[VHDL-FPGA-Verilog用Verilog语言编写的实现NAND Flash块的控制

Description:
Platform: | Size: 13905 | Author: jathe@qq.com | Hits:

[SourceCodemicron m73a系列nand flash 芯片模型

Description: micron公司nand flash芯片m73a系列verilog仿真模型及测试代码
Platform: | Size: 85114 | Author: sucy03 | Hits:

[SDKSamsung 8G x 8 Bit NAND Flash Memory SPEC & Simulatiom model

Description: Samsung 8G x 8 Bit NAND Flash Memory SPEC and verilog Simulatiom model
Platform: | Size: 1328527 | Author: asd12321 | Hits:

[VHDL-FPGA-VerilogNAND01GR3B_VH1

Description:
Platform: | Size: 132096 | Author: chen | Hits:

[VHDL-FPGA-VerilogNAND256R3A_VE1

Description: 256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual -256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual
Platform: | Size: 203776 | Author: 陈强 | Hits:

[VHDL-FPGA-Veriloghdl

Description: 用Verilog语言编写的实现NAND Flash块的控制存取以及同步的FIFO的控制-Using Verilog languages realize NAND Flash block to control access as well as the synchronization FIFO control
Platform: | Size: 6144 | Author: 刘义春 | Hits:

[VHDL-FPGA-VerilogNANDFLASH

Description: 用VHDL开发的NANDFLASH的读写程序,给出 NANDFLASH的时序正确的读写-NANDFLASH developed using VHDL to read and write the procedures, timing NANDFLASH give the correct reading and writing
Platform: | Size: 31744 | Author: mxc | Hits:

[VHDL-FPGA-Verilog4NandFlash

Description: 基于verilog hdl 的Nand Flash控制代码-Verilog hdl-based control code of the Nand Flash
Platform: | Size: 2048 | Author: wxd | Hits:

[FlashMXNand_verilog

Description: NAND flash also uses floating-gate transistors, but they are connected in a way that resembles a NAND gate: several transistors are connected in series, and only if all word lines are pulled high (above the transistors VT) is the bit line pulled low. These groups are then connected via some additional transistors to a NOR-style bit line array. To read, most of the word lines are pulled up above the VT of a programmed bit, while one of them is pulled up to just over the VT of an erased bit. The series group will conduct (and pull the bit line low) if the selected bit has not been programmed.-NAND flash also uses floating-gate transistors, but they are connected in a way that resembles a NAND gate: several transistors are connected in series, and only if all word lines are pulled high (above the transistors VT) is the bit line pulled low. These groups are then connected via some additional transistors to a NOR-style bit line array. To read, most of the word lines are pulled up above the VT of a programmed bit, while one of them is pulled up to just over the VT of an erased bit. The series group will conduct (and pull the bit line low) if the selected bit has not been programmed.
Platform: | Size: 870400 | Author: anirudhh | Hits:

[VHDL-FPGA-VerilogNAND_IP

Description: Nand flash VHDL code and Nand flash verilog code
Platform: | Size: 22528 | Author: psungil | Hits:

[VHDL-FPGA-VerilogMT29FxxG08xx

Description: MT的NAND FLASH MT29FxxG08xx系列的Verilog仿真模型,包含详细说明,试验证明,非常准确。-MT of the NAND FLASH MT29FxxG08xx series of Verilog simulation model, contains a detailed description, testing proved very accurate.
Platform: | Size: 92160 | Author: wuyihua | Hits:

[VHDL-FPGA-VerilogFlash

Description: 三星flash编程Verilog程序,单页编程,支持K9K4G08芯片-Samsung' s flash programming Verilog program, single-page programming, support K9K4G08 chip
Platform: | Size: 1024 | Author: 不知道 | Hits:

[Otheraltera_nand_controller

Description: Altera合作伙伴Eureka Technology.和Cast Inc.为Altera FPGA芯片定制的Nand flash controller IP core-Altera partner Eureka Technology. And the Cast Inc. For the Altera FPGA chip custom Nand flash controller IP core
Platform: | Size: 296960 | Author: Trevor | Hits:

[Multimedia programl52a_nand_model

Description: 美光64GB nand flash 模型 verilog-micron 64GB nand flash verilog module
Platform: | Size: 64512 | Author: cancan | Hits:

[VHDL-FPGA-VerilogNAND_Flash_Controller

Description: FPGA实现的NandFlash控制器(带ECC)文档+源代码。-FPGA implementation NandFlash controller (with ECC) document+ source code.
Platform: | Size: 1587200 | Author: 李银 | Hits:

[VHDL-FPGA-VerilogECC_check

Description: 实现对三星nand Flash的存储信息的错误检测,实现一位纠错,两位检错-ECC check 1bit correct 2bit check Samsung nand Flash
Platform: | Size: 1506304 | Author: xidian | Hits:

[VHDL-FPGA-VerilogNandFlash-FPGA-controller(ECC)

Description: 该压缩包包括NAND FLASH(美光)的FPGA控制器的原理及VHDL源码,非常具有参考价值。-The archive includes NAND FLASH (Micron) the principle of the FPGA and VHDL source code control, very valuable reference.
Platform: | Size: 1587200 | Author: 张明利 | Hits:

[OtherNandController(lattice)

Description: NAND Flash控制器源码 Verilog-NAND Flash controller source Verilog
Platform: | Size: 584704 | Author: wang | Hits:
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