Description: 频率计源代码，性能很好，verilog写的，顶层原理图，底层语言写的，效果很好，开发环境为quartus-Cymometer source code, good performance, verilog written by the top diagram, the bottom language was written. good effect, and development environment for quartus Platform: |
Size: 293888 |
Author:苏纳 |
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Description: 简易数字频率计，用Verilog HDL编写的，基于Quartus II实现，结构清晰，功能较为全面，能满足简单的频率测量要求-Simple digital frequency meter, using Verilog HDL prepared, based on the Quartus II realize, clear structure, function is more comprehensive to meet the simple requirements of frequency measurement Platform: |
Size: 404480 |
Author:余翔 |
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Description: 抢答器。可以直接用QUARTUS2运行，解压无需密码。以前我们做实验的时候用的这个-Answer devices. Can be directly used QUARTUS2 running, unzip without a password. Previous experiments when we used to do this Platform: |
Size: 254976 |
Author:catalina |
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Description: 一个基于FPGA的PCI数据发送程序，实现从计算机通过PCI9054向FPGA发送数据功能。开发语言verilog,开发环境quartus-FPGA-based PCI data distribution process, from the computer through the PCI9054 functions to send data to the FPGA. The development of language verilog, development environment quartusII Platform: |
Size: 236544 |
Author:李国扬 |
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