Description: 用于FPGA的变长编码算法的HDL编码,包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。-Variable-length encoding for FPGA HDL coding algorithms, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms. Platform: |
Size: 4096 |
Author:caesar |
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Description: <p>用verilog 开发应用于图像压缩编码中使用行程长度编码(run lengthencoding,RLE)对交流系数(Aa)进行编码。</p>
-<p> With verilog development for image compression using run length encoding (run lengthencoding, RLE) coding to encode the exchange coefficient (Aa). </p> Platform: |
Size: 9216 |
Author:举例 |
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