Search - verilog scaler

[Software Engineering] DDR_SDRAM_controller_verilog

Description: DDR SRAM控制器的verilog完整设计文档（包含有完整的verilog源代码），-DDR SRAM controller complete Verilog design documents (including a complete Verilog source code),
Platform: | Size: 475136 | Author: lipengfei | Hits:

[VHDL-FPGA-Verilog] MIT_Video-Scaler

Description: MIT的video scaler论文，文章后面附有c和verilog程序源代码，分为水平缩放和垂直缩放-MIT video scaler papers, articles, source code attached to the back, divided into horizontal scaling and vertical scaling
Platform: | Size: 6930432 | Author: zz | Hits:

[VHDL-FPGA-Verilog] video_center_scan_scaler_alpha_blend

Description: 本工程实现两路视频信号阿尔法通道混合(alpha blend), 视频信号黑点中心点扫描定位，期间用到视频帧缓存（frame cache）、视频信号缩放(scaler)等，且用到ram、DDR2等作为缓存，是很值得参考的视频图像处理工程。-scaler,alpha blend,ddr2 controller,center scan, frame cache, dpram, etc by verilog, include code and discription
Platform: | Size: 8481792 | Author: 冰凝 | Hits:

[e-language] scaler

Description: scaler verilog code include with test bench file
Platform: | Size: 7168 | Author: bhmoon | Hits:

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[Software Engineering] DDR_SDRAM_controller_verilog

[VHDL-FPGA-Verilog] MIT_Video-Scaler

[VHDL-FPGA-Verilog] video_center_scan_scaler_alpha_blend

[e-language] scaler

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