Search - verilog spi

Search - verilog spi - List

[VHDL-FPGA-Verilog] SPI_Code(Verilog) DL : 0: SPI总线硬件描述语言Verilog下的实现，含主模式和从模式的实现，经过仿真验证，可作为一个单独的模块使用-SPI bus under the Verilog hardware description language to achieve with the main mode and slave mode realization, through simulation, can be used as a separate module uses
Update : 2025-02-17 Size : 5kb Publisher : 高兵
[VHDL-FPGA-Verilog] spi.tar DL : 0: SPI(serial port interface)的Verilog/VHDL源代碼，已模擬並驗證。-SPI (serial port interface) of the Verilog/VHDL source code, has been simulated and verified.
Update : 2025-02-17 Size : 114kb Publisher : hcjian
[VHDL-FPGA-Verilog] an485_design_example DL : 0: AN485_CH-MAX II CPLD 中的串行外设接口主机（verilog SPI）
Update : 2025-02-17 Size : 305kb Publisher : zhiqiang
[VHDL-FPGA-Verilog] SPI_FireWall DL : 0: verilog spi file with testbench
Update : 2025-02-17 Size : 2.8mb Publisher : xgh
[SCM] mcu-cpld-spi DL : 0: mcu与cpld之间spi接口程序，mcu为master，cpld用verilog写成slave模块-mcu with spi interface program between the CPLD, mcu for the master, cpld written using Verilog slave module
Update : 2025-02-17 Size : 108kb Publisher : 叶灿
[Com Port] spi DL : 0: SPI master的verilog代码-Verilog code for SPI master
Update : 2025-02-17 Size : 2kb Publisher : xudong
[VHDL-FPGA-Verilog] SPI DL : 0: Verilog SPI 源码（来自网络）-Verilog SPI
Update : 2025-02-17 Size : 48kb Publisher : lanbow
[Other] spi.tar DL : 0: This is a verilog code used oversampled clock to implement SPI slave. Also include C code for a ARM processor as the SPI master-This is a verilog code used oversampled clock to implement SPI slave
Update : 2025-02-17 Size : 1kb Publisher : johnl
[Other] 1 DL : 0: SPI的VERILOG实现，最简单、最实用的程序。里面还有技术文档，包括如何使用还有一些信号的意义。非常有用，我也是辛苦才找到的-The realization VERILOG SPI simplest and most practical program. With technical documentation, including how to use some of the signal. Very useful, I also hard to find
Update : 2025-02-17 Size : 108kb Publisher : xiaolu
[VHDL-FPGA-Verilog] spi DL : 0: SPI Verilog code with programmable clock
Update : 2025-02-17 Size : 5.2mb Publisher : sudhir
[Program doc] SPI-in-Verilog-implementation DL : 0: SPI的Verilog实现(非常的全面和详细，还带有SPI算法的注解).-SPI in Verilog implementation (a very full and detailed, but also with the SPI algorithm annotation).
Update : 2025-02-17 Size : 8kb Publisher : 尚林
[VHDL-FPGA-Verilog] spi DL : 0: SPI IP CORE Verilog quartus-SPI IP CORE Verilog quartusii
Update : 2025-02-17 Size : 1.42mb Publisher : thegreeneyes
[VHDL-FPGA-Verilog] modelsim DL : 0: verilog SPI master 的完整实验报告仅供参考切勿抄袭-verilog SPI master
Update : 2025-02-17 Size : 44kb Publisher : ying ma
[VHDL-FPGA-Verilog] spi DL : 0: this the SPI slave module -this is the SPI slave module
Update : 2025-02-17 Size : 2.65mb Publisher : David
[VHDL-FPGA-Verilog] spi DL : 0: Verilog语言写的SPI接口（层次化设计，便于升级）-The implememt of SPI interface using Verilog HDL
Update : 2025-02-17 Size : 42kb Publisher : guorui
[VHDL-FPGA-Verilog] verilog-SPI-core DL : 0: 用VerilogHDL写的spi 核的例子-A simple example of SPI core using Verilog HDL
Update : 2025-02-17 Size : 48kb Publisher : guorui
[Com Port] Verilog-SPI DL : 0: verilog spi code-verilog spi code
Update : 2025-02-17 Size : 44kb Publisher : tiger
[Other] SPI转I2C DL : 0: SPI协议至IIC协议转换的verilog代码(SPI protocol to IIC protocol conversion Verilog code)
Update : 2025-02-17 Size : 923kb Publisher : 昊天一怪
[VHDL-FPGA-Verilog] Nitro-Parts-lib-SPI-master DL : 0: Nitro-Parts-lib-SPI Verilog SPI master and slave
Update : 2025-02-17 Size : 5kb Publisher : d.pershin
[VHDL-FPGA-Verilog] FPGA与SPI接口程序(hdl源代码) DL : 0: FPGA,VERILOG,SPI串口通信；(FPGA,VERILOG,SPI;;;;;;;;;)
Update : 2025-02-17 Size : 2kb Publisher : dl121

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