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Description: CPLD 與 61LV256 SRAM 驱动 4.3 吋的 TFT,附 Verilog 語言範例.
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Size: 2896 |
Author: xyz543 |
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Description: 用verilog HDL写的操作SRAM的源码-with Verilog HDL write operation SRAM FOSS
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Size: 6144 |
Author: 刘波 |
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Description: ZBT SRAM控制器参考设计,xilinx提供,(ZBT SRAM是一种高速同步SRAM)-ZBT SRAM controller reference design for Xilinx (ZBT SRAM, a high-speed synchronous SRAM)
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Size: 35840 |
Author: 陈旭 |
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Description: 告诉图形采集 verilog代码 很简单的 第一次发-tell graphics Acquisition Verilog code is very simple first grant
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Size: 222208 |
Author: 徐常志 |
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Description: sram 读写小程序,用verilog编写的,请各位高手指教-SRAM read and write small programs using Verilog prepared, please enlighten you master
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Size: 1024 |
Author: kevin |
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Description: the verilog model of sram IS61LV25616AL device.-verilog model of the IS61LV25616AL de sram vice.
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Size: 24576 |
Author: nightyboy |
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Description: verilog语言编写的FPGA代码。功能为pc机通过epp不断写数到sram中,然后pc发送中断信号打断写过程读取sram中的数据。rar包中包含epp协议,模块文件和测试文件(test)。-Verilog FPGA code languages. Pc machine functions through a number of epp constantly write to the SRAM, and then pc send interrupt signals to interrupt the process of writing to read the data in the SRAM. rar package includes epp agreement, modules and test documents (test).
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Size: 43008 |
Author: 苗苗 |
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Description: 是一个基于VHDL的SRAM程序,很有代表意义,下下吧-Is a VHDL of SRAM-based procedures, is very representative of significance, under the under the bar
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Size: 3072 |
Author: 张俊 |
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Description: verilog 写的 memory controller ,可以控制SDRAM SRAM NOR -written in Verilog memory controller, can control SDRAM SRAM NOR
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Size: 331776 |
Author: youjia |
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Description: DDR SRAM控制器的verilog完整设计文档(包含有完整的verilog源代码),-DDR SRAM controller complete Verilog design documents (including a complete Verilog source code),
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Size: 475136 |
Author: lipengfei |
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Description: verilog编写fpga与片外SRAM通信模块-Verilog FPGA with the preparation of SRAM chip communication module
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Size: 418816 |
Author: 宇天 |
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Description: SRAM和USB芯片FT245的VERILOG逻辑控制-USB chip SRAM and logic control VERILOG the FT245
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Size: 2048 |
Author: zly |
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Description: Verilog 编写的IP核,512K的16位SRAM-Written in Verilog IP core, 512K 16-bit SRAM
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Size: 11264 |
Author: zhyy |
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Description: verilog 编写基于SRAM(CY7C1041)的代码-Verilog prepared based on the SRAM (CY7C1041) code
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Size: 888832 |
Author: wb |
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Description: SDRAM的vegilog代码,做一个SDRAM的封装成为SRAM一样进行操作。一个顶层文件下由三个模块-SDRAM
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Size: 717824 |
Author: 吴厚航 |
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Description: 使用Verilog写的SRAM的控制程序,仅供参考!-The use of the SRAM write Verilog the control procedures, for reference purposes only!
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Size: 2048 |
Author: yangyu |
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Description: SRAM控制器,含整个工程
vSRAM控制器,含整个工程
SRAM控制器,含整个工程-SRAM SRAMSRAMSRAMSRAMSRAMSRAMSRAMSRAM
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Size: 236544 |
Author: leee |
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Description: a verilog sram code. use it to manipulate sram on fpga
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Size: 1024 |
Author: DCLAB |
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Description: Verilog 语言描述,SRAM的实验操作,Quartus中编译通过-Verilog language description, SRAM experimental operation, Quartus compiled by
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Size: 308224 |
Author: 老虎 |
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Description: 用verilog hdl语言编写的fpga与片外sram 的读写控制-With the verilog hdl language fpga sram chip with read and write control
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Size: 57344 |
Author: yishuihan |
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