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[Wavelet] Dwt离散db小波

Description: 小波变换子程序-Wavelet Transform Subroutine
Platform: | Size: 4096 | Author: | Hits:

[Books] 030413

Description: 一篇基于小波变换的使用SPIHT算法进行图像压缩的文章-one based on wavelet transform SPIHT the use of image compression algorithm for the article
Platform: | Size: 201728 | Author: b | Hits:

[Graph program] wlift_bior_7_9_JPEG2000

Description: jpeg2000中的空间变换中的DWT，9/7有损小波正变换，这是在ADI blackfin535 DSP平台下的-JPEG2000 transform space of the DWT, 9/7 wavelet is detrimental to transform, which is in the ADI blackfin535 DSP platform
Platform: | Size: 44032 | Author: chenlei | Hits:

[Graph program] wlift_inv_bior3_5_JPEG2000

Description: jpeg2000中的空间变换中的DWT，5/3无损小波逆变换，这是在ADI blackfin535 DSP平台下的-JPEG2000 transform space of the DWT, 5/3 non-destructive inverse wavelet transform, which is in the ADI blackfin535 DSP platform
Platform: | Size: 41984 | Author: chenlei | Hits:

[Graph program] wlift_inv_bior7_9_JPEG2000

Description: jpeg2000中的空间变换中的DWT，9/7有损小波逆变换，这是在ADI blackfin535 DSP平台下的-JPEG2000 transform space of the DWT, 9/7 inverse wavelet transform detrimental, which is in the ADI blackfin535 DSP platform
Platform: | Size: 43008 | Author: chenlei | Hits:

[Other] 97_2D_2Level

Description: 這是一個二維的上提式9/7離散小波的Verilog的源碼,此為Encoder-This is a two-dimensional lift-style 9/7 discrete wavelet of Verilog source code, this is Encoder
Platform: | Size: 7728128 | Author: chiahao | Hits:

[Other Embeded program] wavelet_lifting_pld

Description: 小波提升Verilog代码，运行于quartusⅡ开发环境。-Wavelet Lifting Verilog code, running on the quartus Ⅱ development environment.
Platform: | Size: 495616 | Author: chalin tong | Hits:

[Wavelet] compressVLSI

Description: 高速图像压缩编码器的VLSI结构设计研究.kdh 相当有水平的博士论文。里面详细讲到了如何设计小波变换VLSI结构。并对verilog hdl设计结构进行了评估-High-speed image compression encoder the structural design of VLSI Research. Kdh quite the level of doctoral dissertation. Which describes in detail how to design the structure of wavelet transform VLSI. Verilog hdl design and structure of the assessment
Platform: | Size: 1733632 | Author: 黄辉 | Hits:

[Wavelet] liftbd53

Description: db53小波的verilog硬件实现源码-Wavelet db53 Verilog hardware source
Platform: | Size: 1024 | Author: 吕娴娜 | Hits:

[Compress-Decompress algrithms] verilog_code

Description:
Platform: | Size: 7168 | Author: Frey Lin | Hits:

[Compress-Decompress algrithms] dwt(SPIHT256)

Description: 可用的基于小波的spiht算法，可以自己设定小波分解基数，做成人机交互界面，直观-Available to the SPIHT algorithm based on wavelet, wavelet decomposition can be set for the base, resulting in human-computer interaction interface, intuitive
Platform: | Size: 4057088 | Author: 李雨 | Hits:

[VHDL-FPGA-Verilog] verilogdct

Description: dct实现verilog hdl的数字图像处理，源代码-dct achieve verilog hdl digital image processing, source code
Platform: | Size: 28672 | Author: xutongxue | Hits:

[VHDL-FPGA-Verilog] 5_3

Description: 53整数小波滤波，编译已经成功，仿真也已经通过，是网上着的资料-53 integer wavelet filter, has been successfully compiled, the simulation has also been adopted, is online with information
Platform: | Size: 1005568 | Author: teamcen | Hits:

[VHDL-FPGA-Verilog] wavelet

Description: 基于DB8小波变换的verilog代码设计，支持Avalon总线-Verilog DB8 Wavelet Transform Based on code design, support Avalon bus
Platform: | Size: 7168 | Author: jacky | Hits:

[VHDL-FPGA-Verilog] NET2

Description: This file with the wavelet transf Mallat implementation of wavelet Verilog hdl code modules for radi Modelsim 6.6 crack, can be used f A written using Verilog DDR2 cont Simple CPU VHDL implementation an Dual-port RAM design, using Veril Verilog language, a hardware-base FPGA embedded project combat, Man Application FPGA, FPGA-chip hardw Mallat implementation of wavelet Layer of one-dimensional wavelet
Platform: | Size: 1852416 | Author: sansfroid | Hits:

[Wavelet] begin

Description: 9/7提升小波变换中奇偶分裂步、预测步、边界延拓处理和模块测试平台的Verilog代码描述：-9/7 lifting wavelet transform in odd and even split-step, prediction step, boundary extension process and module test platform described in Verilog code:
Platform: | Size: 2048 | Author: 张龙升 | Hits:

[Wavelet] VerilogHDL

Description: 9/7提升小波变换中奇偶分裂步、预测步、边界延拓处理和模块测试平台的Verilog代码描述：-9/7 lifting wavelet transform in odd and even split-step, prediction step, boundary extension process and module test platform described in Verilog code:
Platform: | Size: 3072 | Author: 张龙升 | Hits:

[VHDL-FPGA-Verilog] liftbd53

Description: 小波提升算法5_3 verilog 源码-Wavelet lifting algorithm 5_3 verilog source
Platform: | Size: 1024 | Author: qwbaoba | Hits:

[Software Engineering] 1e52

Description: 高速图像压缩编码器的VLSI结构设计研究.kdh 相当有水平的博士论文。里面详细讲到了如何设计小波变换VLSI结构。并对verilog hdl设计结构进行了评估-The high-speed image compression VLSI architecture design of the encoder the study. Kdh quite the level of Ph.D. thesis. Which talked about in detail how to design VLSI architecture of wavelet transform. Assessment and verilog hdl design structure
Platform: | Size: 1734656 | Author: 木阮清 | Hits:

[File Format] FPGA-design-of-wavelet-filter

Description: 基于Verilog的小波滤波器程序设计的总结文档。-Verilog based wavelet filter program design summary document.
Platform: | Size: 263168 | Author: xiezhi | Hits:
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