Welcome![Sign In][Sign Up]
Location:
Search - vga veril

Search list

[VHDL-FPGA-VerilogDE2_TV

Description: 一个模拟视频输入转VGA视频输出的Verilog程序,视频解码芯片采用ADV7181B,VGA DAC采用ADV7123,强力推荐-an analog video input to VGA video output Verilog procedures, Video decoder chip used ADV7181B, VGA DAC used ADV7123, strongly recommended!
Platform: | Size: 26624 | Author: 李全 | Hits:

[VHDL-FPGA-VerilogVGA_2c5

Description: FPGA EP2C5 VGA 使用verilogHdl-VGA EP2C5 FPGA use verilogHdl
Platform: | Size: 307200 | Author: liupan | Hits:

[VHDL-FPGA-Verilogvga_verilog

Description: 本示例演示了VGA的控制方法,程序配置后可以在CRT上显示中文汉字等信息。-this example demonstrated the VGA control methods, procedures after the distribution of CRT Chinese characters on the show and other information.
Platform: | Size: 7168 | Author: dragon | Hits:

[VHDL-FPGA-VerilogVHDL-vga_core(vhdl)

Description: VHDL-vga_core(vhdl).rar FPGA上实现 VGA的IP(VHDL)-VHDL-vga_core (vhdl). RarFPGA realize VGA on the IP (VHDL)
Platform: | Size: 458752 | Author: nanotalk | Hits:

[VHDL-FPGA-Verilogvga_lcd

Description: 这个是VGA的核是NOIS开发时使用的IP CORES 在FPGA的开发中使用的比较多-This is a VGA Nois nuclear development is the use of IP CORES in the FPGA used in the development of more
Platform: | Size: 605184 | Author: luojie | Hits:

[VHDL-FPGA-Verilog8080

Description: EPM1270和单片机的8080通讯接口,适合单片机与CPLD之间的高速通讯,verilog语言,QuartusII环境-EPM1270 and 8080 MCU communication interface for MCU and CPLD high-speed communication between, verilog language, QuartusII environment
Platform: | Size: 483328 | Author: 汉武帝 | Hits:

[Documents7670_YUV_VGA_20fps_rev_1.1

Description: ov7670 VGA寄存器配置,由ov公司提供-Register ov7670 VGA configuration, provided by the ov
Platform: | Size: 1024 | Author: lotus lian | Hits:

[VHDL-FPGA-VerilogS8_VGA

Description: VGA的verilog hdl 程序,完成显示长条状显示不同颜色-VGA s verilog hdl procedures, completion of a long strip show show different color
Platform: | Size: 498688 | Author: 许立宾 | Hits:

[VHDL-FPGA-Veriloghdl

Description: 网上流传的用来实现FPGA驱动VGA,从而实现一个pingpong小游戏的源码,实测可用。-a program embedded in a FPGA in order to drive the VGA and realize a little game named pingpong. tested.
Platform: | Size: 2048 | Author: escut | Hits:

[VHDL-FPGA-Verilogvga

Description: 最全的FPGA VGA方面的资料及源码. VGA IPcore的Verilog代码 VGA接口设计实例及测试程序 VGA接口设计实例及测试程序(源码) VGA显示源码-FPGA VGA most comprehensive information and source code. VGA IPcore the Verilog code VGA interface design and testing procedures VGA interface design and testing procedures (source) VGA display source
Platform: | Size: 2146304 | Author: likufan | Hits:

[VHDL-FPGA-Verilogcameralink

Description: 由于目前基于CameraLink接口的各种相机都不能直接显示,因此本文基于Xilinx公司的Spartan 3系列FPGAXC3S1000-6FG456I设计了一套实时显示系统,该系统可以在不通过系统机的情况下,完成对相机CameraLink信号的接收、缓存、读取并显示 系统采用两片SDRAM作为帧缓存,将输入的CameraLink信号转换成帧频为75Hz,分辨率为1 024×768的XGA格式信号,并采用ADV7123JST芯片实现数模转换,将芯片输出的信号送到VGA接口,通过VGA显示器显示出来-As the CameraLink interface is currently based on a variety of cameras can not directly display, this article based on Xilinx' s Spartan 3 series FPGAXC3S1000-6FG456I designed a set of real-time display system, the system can be achieved without machine case through the system to complete the CameraLink cameras signal reception, cache, read and display systems use two SDRAM frame buffer as the input signals into the CameraLink frame rate of 75Hz, a resolution of 1 024 × 768 for XGA format signal, and using ADV7123JST chip digital-analog conversion, the chip output signal to the VGA port, through the VGA display monitor
Platform: | Size: 13312 | Author: lilei | Hits:

[VHDL-FPGA-VerilogVga

Description: The code is used to interface PC monitor with Spartan 3E for the display. if you run the program on spartan 3 you would be able to see different test pattern on the monitor screen
Platform: | Size: 626688 | Author: asit | Hits:

[VHDL-FPGA-VerilogProyecto2(Gato)

Description: Verilog, Gato Game, CAT game!, VGA
Platform: | Size: 841728 | Author: ivan | Hits:

CodeBus www.codebus.net