Search - vhdl 74181

[VHDL-FPGA-Verilog] ALU_verilog

Description: 用verilog语言编写的4位算术逻辑单元ALU,功能参考74181，包含.v文件以及测试用.vwf文件-Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document
Platform: | Size: 2048 | Author: 颜心馨 | Hits:

[VHDL-FPGA-Verilog] alu_16

Description: 三种16位整数运算器的ALU设计方法，调用库函数74181（4位ALU），组成串行16位运算器。(用74181的正逻辑) B．调用库函数74181和74182，组成提前进位16位运算器。(用74181的正逻辑) 注意：调74181库设计，加进位是“0”有效，减借位是“1”有效，所以最高位进位或借位标志寄存器要统一调整到高有效 C．用always @，case方式描述16位运算器。-Three 16-bit integer arithmetic logic unit of the ALU design methodology, called library function 74181 (4 ALU), composed of serial 16-bit arithmetic logic unit. (With 74,181 positive logic) B. Call library functions 74181 and 74182 to form the advance into the 16-bit arithmetic logic unit. (With 74,181 positive logic) Note: 74,181 Treasury tune the design, add bit is
Platform: | Size: 1024 | Author: yifang | Hits:

[VHDL-FPGA-Verilog] ALU_design

Description: 74181alu vhdl设计，欢迎您的下载-74181alu vhdl
Platform: | Size: 318464 | Author: wws | Hits:

[Documents] ALU

Description: quartus ii 13.0 based,74181 vhdl code implementation
Platform: | Size: 2112512 | Author: cccwe1 | Hits:

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[VHDL-FPGA-Verilog] ALU_verilog

[VHDL-FPGA-Verilog] alu_16

[VHDL-FPGA-Verilog] ALU_design

[Documents] ALU

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