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[Other resource] pulse-VHDL

Description: 可控脉冲产生ＶＨＤＬ程序 开发软件ＩＳＥ，程序通过了器件后仿真并在芯片ＸＣ９５７２中实现了-controllable pulse generated VHDL ISE software development procedures, procedures adopted after the simulation devices and chips to achieve the XC9572
Platform: | Size: 43916 | Author: 林海 | Hits:

[Other] ISE_chinese

Description: 通俗的介绍了ise的使用方法，对vhdl和verilog开发的初学者来说是不错的选择-popular introduction to the use of the method ideally, the VHDL and Verilog development of the newcomer is a good choice
Platform: | Size: 934912 | Author: 周玲玲 | Hits:

[VHDL-FPGA-Verilog] 8倍频vhdl

Description: 该文件可用vhdl语言实现时钟8倍频，运行环境可在maxplus2和ise的仿真软件上-the document available VHDL Language 8 clock frequency, the operating environment and ideally maxplus2 simulation software
Platform: | Size: 1024 | Author: 罗兵武 | Hits:

[VHDL-FPGA-Verilog] Lab_ISE_Led

Description: vhdl实例教程，其中的例子适合新手演示使用，肯定会有帮助的。-VHDL example tutorial, an example of the use for novice demo, it will certainly help.
Platform: | Size: 779264 | Author: ghjghj | Hits:

[VHDL-FPGA-Verilog] pulse-VHDL

Description: 可控脉冲产生ＶＨＤＬ程序 开发软件ＩＳＥ，程序通过了器件后仿真并在芯片ＸＣ９５７２中实现了-controllable pulse generated VHDL ISE software development procedures, procedures adopted after the simulation devices and chips to achieve the XC9572
Platform: | Size: 44032 | Author: 林海 | Hits:

[Books] vhdl-fpga

Description: 这是一本很好用的VHDL编程书，各位看了就明白。-This is a very good use of VHDL programming, you read it to understand.
Platform: | Size: 7723008 | Author: lqt76 | Hits:

[Embeded-SCM Develop] i2c_code(vhdl)

Description: i2c源码vhdl语言编写，传上与大家分享，请多指教-i2c source VHDL language, communicating with everyone sharing, please enlighten
Platform: | Size: 4096 | Author: bobodu | Hits:

[VHDL-FPGA-Verilog] vhdl-2

Description:
Platform: | Size: 59392 | Author: lileiming | Hits:

[Embeded-SCM Develop] vhdlcodes

Description: FPGA/CPLD集成开发环境ISE的使用详解 示例代码1-FPGA/CPLD Integrated Development Environment ISE Comments on the use of a code sample
Platform: | Size: 114688 | Author: 邓志斌 | Hits:

[VHDL-FPGA-Verilog] CCDOUT

Description: CCD信号由于其特殊性,一般不能有信号源产生,本程序采用VHDL语言，以ISE为开发平台，产生了模拟CCD信号的数字信号，只需经DA转换便能实现-CCD signal because of its uniqueness, not generally produce a signal source, the procedures used VHDL, ISE as a development platform, have CCD signal simulation of digital signal only after DA conversion can be achieved
Platform: | Size: 1085440 | Author: 刘小军 | Hits:

[Software Engineering] VHDL

Description: 本系统使用VHDL语言进行设计，采用自上向下的设计方法。目标器件选用Xilinx公司的FPGA器件，并利用Xilinx ISE 7.1 进行VHDL程序的编译与综合，然后用Modelsim Xilinx Edition 6.1进行功能仿真和时序仿真。-The system design using VHDL language, using top-down design method. Selection of the target device Xilinx
Platform: | Size: 297984 | Author: 西西 | Hits:

[Books] shuzizhong

Description: 介绍了用VHDL设计数字钟的相关知识,是学习VHDL的经典例子.-Introduction with VHDL design knowledge digital clock is a classic example of learning VHDL.
Platform: | Size: 31744 | Author: | Hits:

[VHDL-FPGA-Verilog] ise

Description: FPGA/CPLD设计工具---Xilinx ISE使用详解光盘源代码，Xilinx公司推荐的FPGA/CPLD培训教材-FPGA/CPLD design tools-Xilinx ISE explain the use of CD-ROM source code, Xilinx Inc. recommended FPGA/CPLD training materials
Platform: | Size: 22214656 | Author: 文成 | Hits:

[VHDL-FPGA-Verilog] usb

Description: 这是个USB 的VHDL 程序，进去直接双击ISE 就可以用了-This is a USB-VHDL procedures, into direct ISE can use double-click the
Platform: | Size: 1644544 | Author: 张亚伟 | Hits:

[VHDL-FPGA-Verilog] AD9229-FPGA-files

Description: adi串行AD AD9229的控制使用ISE平台 Verilog语言 -adi serial ADAD9229 control the use of ISE platform Verilog language
Platform: | Size: 184320 | Author: 徐凯 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.-it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.
Platform: | Size: 31744 | Author: yasir ateeq | Hits:

[VHDL-FPGA-Verilog] uart_ise_vhdl

Description: fpga里实现 uart 经典 vhdl语言写的 ise工程文件-fpga implementation in vhdl language classic uart of ise project file
Platform: | Size: 22528 | Author: 孙俪 | Hits:

[Software Engineering] ISE

Description: 是ISE的中文教程，主要是对初学者演示和展示在XILINX的ISE集成软件环境下，如何用VHDL和原理图的方式进行设计输入，用MOdelsim方针。-ISE is a Chinese course is mainly for beginners and display presentation of the ISE in XILINX Integrated Software environment, how to use VHDL and schematic design entry way, with the principle of MOdelsim.
Platform: | Size: 934912 | Author: 谢斌斌 | Hits:

[Other] ISEtutorial

Description: ISE开发环境讲解,由台湾的一名高手所做-Description of ISE development environment
Platform: | Size: 3281920 | Author: | Hits:

[VHDL-FPGA-Verilog] 2FSK调制解调的FPGA实现（VHDL）

Description: 2FSK调制解调的FPGA设计，基于XINLINX的ISE平台开发，采用VHDL语言设计，有设计文档，欢迎学习借鉴(The FPGA design of 2FSK modulation and demodulation, based on the ISE platform of xinlinx, is designed with VHDL language, with design documents, welcome to learn)
Platform: | Size: 2466816 | Author: 无线电之家99 | Hits:
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