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[Other resource] VHDL-jishushizhong

Description: 这是一个用VHDL编的一个计数时钟的设计,程序各个模块都有,希望和大家多多交流-This is an addendum to the VHDL a clock counting the design, each module has procedures, and we hope to conduct more exchanges
Platform: | Size: 2487 | Author: 曹喜 | Hits:

[VHDL-FPGA-Verilog] VHDL的基本数学运算库

Description: VHDL的基本数学运算库,非常好用-VHDL basic arithmetic library, a very handy! !
Platform: | Size: 232448 | Author: | Hits:

[VHDL-FPGA-Verilog] 一篇用VHDL实现快速傅立叶变换的论文

Description: 一篇用VHDL实现快速傅立叶变换的论文，包括原理分析和代码实现，印度圣雄甘地大学M.A.学院提供-VHDL with a Fast Fourier Transform papers, including the principle of analysis and implementation of the code, the Mahatma Gandhi Institute of the University of Marat
Platform: | Size: 62464 | Author: | Hits:

[VHDL-FPGA-Verilog] VHDL作业－张晓峰036099149

Description: VHDL的四选一选择器-VHDL four elected a selector
Platform: | Size: 51200 | Author: 熊辉波 | Hits:

[VHDL-FPGA-Verilog] 朱明辉vhdl大作业

Description: 一个双向总线的vhdl实现-a two-way bus VHDL achieve
Platform: | Size: 25600 | Author: 熊辉波 | Hits:

[VHDL-FPGA-Verilog] vhdl-多功能电子表

Description: 这是一个用vhdl编的多功能电子秒表，可以记录几个人的时间，并且可以在跑秒的时候查看记录。。〔原创〕-This is a series with VHDL multifunctional electronic stopwatch, can be recorded by several people, and that they could run in the second examined the records. . [Original]
Platform: | Size: 5120 | Author: 王继东 | Hits:

[VHDL-FPGA-Verilog] 8051的内核(vhdl)

Description: 最完整最实用的8051的软核，用VHDL语言编写全部原代码，并有详细的注释介绍，对开发增强型多功能单片机或RSIC单片机内核和单片机SOC应用非常有参考价值-most complete most practical of the 8051 soft-core, with all the preparation VHDL source code, and the Notes for a detailed briefing on the development of an enhanced multi-purpose microcontroller core or RSIC microcontroller and microprocessor applications SOC very valuable reference
Platform: | Size: 212992 | Author: czy | Hits:

[VHDL-FPGA-Verilog] vhdl实现alu的源代码

Description: VHDL实现ALU的源代码，并且提供了一个详细的testbench！-ALU VHDL source code, and provide a detailed testbench!
Platform: | Size: 1024 | Author: 飞扬 | Hits:

[VHDL-FPGA-Verilog] Original-8051 Vhdl Model

Description: 這是Originl公司出的8051 VHDL source code.-It s a 8051 VHDL source code issued by Original.
Platform: | Size: 225280 | Author: ㄚ福 | Hits:

[SCM] VHDL范例

Description: 最高优先级编码器 8位相等比较器 三人表决器（三种不同的描述方式） 加法器描述 8位总线收发器：74245 （注2） 地址译码（for m68008） 多路选择器（使用select语句） LED七段译码 多路选择器（使用if－else语句） 双2－4译码器：74139 多路选择器（使用when－else语句） 二进制到BCD码转换 多路选择器 （使用case语句） 二进制到格雷码转换 双向总线（注2） 汉明纠错吗译码器 三态总线（注2） 汉明纠错吗编码器 解复用器 -highest priority encoder, compared to eight for phase three of the vote (the description of three different ways) Adder Description eight bus Transceivers : 74,245 (Note 2) address decoder (for m68008) Multiple choice (use select statement) LED paragraph 107 of decoding multiple choice ( use if-else statements) 2-4 dual decoder : over 74,139 road choice (use when-else statements) of the binary conversion BCD multiple choice (use case statement) binary Gray code conversion to a two-way bus (Note 2)? Hamming error correction decoder three-state Bus (Note 2)? Hamming error correction encoder demultiplexer
Platform: | Size: 43008 | Author: kerty | Hits:

[File Format] 用VHDL实现查找表方式的FIR滤波器

Description: 这些是我所看到的一些资料，希望与大家分享。也许对您用处不大，但我是一片诚意-these are what I saw in some of the information and hope to share with you all. Perhaps your little usefulness, but I was a sincerity
Platform: | Size: 144384 | Author: yin | Hits:

[VHDL-FPGA-Verilog] 国外的VHDL应用例子

Description: 国外的VHDL应用例子，大家可一好好参考一下！-abroad VHDL Application examples, we can make reference to a properly!
Platform: | Size: 232448 | Author: gjd | Hits:

[VHDL-FPGA-Verilog] 一个VHDL实现的测频计

Description: 一个vhdl实现的测频计,开发环境为任何支持vhdl语言的厂商提供的开发环境 -VHDL achieve a frequency measurement of dollars, development environment for any VHDL language support for manufacturers of the development environment
Platform: | Size: 1024 | Author: yaya | Hits:

[VHDL-FPGA-Verilog] 分频器VHDL描述

Description: 在数字电路中，常需要对较高频率的时钟进行分频操作，得到较低频率的时钟信号。我们知道，在硬件电路设计中时钟信号时非常重要的。-in digital circuits, the need for regular high frequency clock operating frequency for hours, a lower frequency of the clock signal. We know that the hardware circuit design clock signal is very important.
Platform: | Size: 5120 | Author: 王力 | Hits:

[VHDL-FPGA-Verilog] VHDL 的实例程序，共44个

Description: 经典VHDL 的实例程序，共44个！要下载的尽快-classic examples of VHDL, with a total of 44! To download as soon as possible
Platform: | Size: 43008 | Author: 立立 | Hits:

[VHDL-FPGA-Verilog] (AMI)vhdl设计实例

Description: 这是一本介绍VHDL编成的教材，是一本实例，内有很多简单的复杂的源代码，使编程初学者的绝好工具-This is a VHDL introduced into the materials is an example, there are a lot of simple and complex source code, giving developers an excellent tool for beginners
Platform: | Size: 168960 | Author: AKXIAOHAI77 | Hits:

[VHDL-FPGA-Verilog] vhdl对数

Description: 对数计算源程序，能够在FPGA中计算某数的对数，VHDL源代码，-right calculating source, the FPGA can be calculated for a number of a few, VHDL source code,
Platform: | Size: 116736 | Author: wl | Hits:

[VHDL-FPGA-Verilog] ASK.VHDL

Description: ASK调制VHDL程序及仿真 基于VHDL硬件描述语言，对基带信号进行ASK振幅调制-ASK modulation VHDL simulation based on the procedures and VHDL hardware description language, the baseband signal amplitude modulation ASK
Platform: | Size: 41984 | Author: 少龙 | Hits:

[VHDL-FPGA-Verilog] A-law_enc

Description: A-law Encoder (VHDL)
Platform: | Size: 2048 | Author: Victor | Hits:

[VHDL-FPGA-Verilog] Wiley.IEEE.Press.RTL.Hardware.Design.Using.VHDL.A

Description: Wiley IEEE PRESS RTL Hardware Design using VHDL 2006
Platform: | Size: 28495872 | Author: aaqib | Hits:
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