Description: 无私奉献，VHDL 源码，用于实现FPGA上的UART(串口控制器)，可以实现FPGA与单片机，PC机的串口通讯。-Selfless dedication, VHDL source code for the FPGA realization of the UART (serial port controller), you can realize FPGA and MCU, PC serial communication machine. Platform: |
Size: 6144 |
Author:骑士 |
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Description: 用硬件VHDL语言实现的串口通信的试验代码，可用来代替单片机的工作对串口进行测试。-VHDL language used hardware realize the serial communication of test code that can be used to replace the work of single-chip serial port for testing. Platform: |
Size: 273408 |
Author:姚大雷 |
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Description: 串口通信的概念非常简单，串口按位（bit）发送和接收字节。尽管比按字节（byte）的并行通信慢，但是串口可以在使用一根线发送数据的同时用另一根线接收数据。它很简单并且能够实现远距离通信。比如IEEE488定义并行通行状态时，规定设备线总常不得超过20米，并且任意两个设备间的长度不得超过2米；而对于串口而言，长度可达1200米。典型地，串口用于ASCII码字符的传输。通信使用3根线完成：（1）地线，（2）发送，（3）接收。由于串口通信是异步的，端口能够在一根线上发送数据同时在另一根线上接收数据。其他线用于握手，但是不是必须的。串口通信最重要的参数是波特率、数据位、停止位和奇偶校验。-The concept of serial communication is very simple, serial by bit (bit) to send and receive bytes. Although more than by byte (byte) of parallel communication slow, but can use a serial line to send data at the same time another line to receive data. It is very simple and can achieve long-distance communications. For example, the definition of IEEE488 parallel access mode, the total line often provides equipment shall not be more than 20 meters, and between any two devices may not be more than two meters in length and in terms of the serial port, up to 1200 meters in length. Typically, serial code for the ASCII character transmission. 3 lines of communication to use to complete: (1) ground, (2) send, (3) to receive. Due to the asynchronous serial communication port to send data in a line at the same time another line to receive data. Other lines for the handshake, but not necessary. Serial communication the most important parameter is the baud rate, data bits, stop bits and parity.
Platform: |
Size: 1024 |
Author:zhendongzhao |
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Description: 序列检测器可用来检测一组或多组由二进制码组成的脉冲序列信号，这在数字通信领域有广泛的应用。当检测器连续收到一组串行二进制码后，若这组码与检测器中预制的码相同，输出为A，否则输出为B。序列检测I/O口的设计如下：设Din是串行数据输入端，clk是工作时钟，clr是复位信号，D是8位待检测预置数，QQ是检测结果输出端。-Sequence detector can be used to detect one or more sets consisting of binary code from the pulse sequence signal, which is a broad field of digital communication applications. When the detector continuously received after a group of serial binary code, if this group of pre-code and the code detector in the same output as A, otherwise the output B. Sequence detection I/O port design are as follows: Let Din is the serial data input, clk is work the clock, clr is a reset signal, D is the 8-bit preset number to be detected, QQ is the test results output. Platform: |
Size: 4096 |
Author:yufang |
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Description: 除了顶层模块（ps2_key），三个底层模块分别为PS/2传输处理模块(ps2scan)、串口传输模块(my_uart_tx)以及串口波特率选择模块(speed_select)（下面只给出顶层模块和PS/2传输处理模块的verilog代码，串口部分的设计可以参考串口通信设计）。-In addition to top-level module (ps2_key), three low-level modules are PS/2 transmission processing module (ps2scan), serial transmission module (my_uart_tx) and the serial port baud rate selection module (speed_select) (the following is given only to top-level module and PS/2 verilog code for transport processing module, serial part of the design can refer to the serial communication design). Platform: |
Size: 155648 |
Author:lishaohui |
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Description: 编制一全双工UART电路，通过试验箱MAX202E转换成RS232电平，与计算机进行通讯实验，设置8个按键，按键值为ASIC码“1”~“8”，通过串口发送给计算机，在计算机上显示键值，同时在数码管最高位显示；计算机可发送“0”~“F”的ASIC码，FPGA接收后在数码管低位显示0~F。通过按键可设置波特率。
要求：波特率为三种 1200、2400、9600，由1个按键选择，3个LED分别指示；
数据格式为1位起始位、8位数据位和一位停止位；
上位计算机发送接收软件可使用“串口调试器“软件；
发送和接收数据时，由两个LED分别指示。
发挥：自动回发功能、接收到特殊字符（自定义）自动更改波特率。(A full duplex UART circuit, converted into RS232 level by MAX202E test box, communication experiment with computer, set of 8 buttons, keys for ASIC code "1" to "8", to the computer through the serial port to send and display keys on the computer, at the same time in the digital tube display high computer can send "; 0" to "F" in the ASIC code, FPGA after receiving the digital tube display low 0~F. You can set the baud rate by the button.
Requirements: baud rate for three, 1200, 2400, 9600, selected by 1 buttons, 3 LED, respectively;
The data format consists of 1 bit start bits, 8 bit data bits, and one stop bit;
The upper computer sends and receives the software, and the serial debugger can be used;
When sending and receiving data, instructions are given by two LED respectively.
Play: Auto postback function, receive special characters (custom), change baud rate automatically.) Platform: |
Size: 2948096 |
Author:淡淡的意识
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Description: rs232串口基于VHDL的代码 很有用的 正确的 rs232串口基于VHDL的代码 很有用的 正确的(RS232 serial port based on VHDL code is very useful for the correct RS232 serial port based on VHDL code is very useful) Platform: |
Size: 3072 |
Author:孙悦 |
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