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[VHDL-FPGA-Verilog靳远-源程序

Description: 几个VHDL的源代码和和一个本人编写的5级流水线RISC CPU的代码-several VHDL source code, and in my preparation of a five pipelined RISC CPU code
Platform: | Size: 443392 | Author: core_design | Hits:

[VHDL-FPGA-VerilogCOP2000

Description: cpu微命令vhdl源代码-cpu-order VHDL source code
Platform: | Size: 5120 | Author: | Hits:

[ARM-PowerPC-ColdFire-MIPSleon2-1.0.30-xst.tar

Description: Leon2 CPU VHDL Source Code 欧洲航天局资助开发的LEON CPU,源码遵循GPL -Leon2 CPU VHDL Source Code European Space Agency funded the development of LEON CPU, followed source GPL
Platform: | Size: 1397760 | Author: 笑雨 | Hits:

[SCMVHDL实现简单的8位CPU2

Description: 用VHDL实现8位的单片机!里面 有开发过程和代码阿!很详细的哦-using VHDL eight of SCM! Inside the development process and code Ah! Detailed oh
Platform: | Size: 53248 | Author: 冯海 | Hits:

[VHDL-FPGA-Verilog数字系统设计相关

Description: 这是有关VHDL的相关源代码,有简易CPU、加法器、除法器、计数器等-This is the relevance of the VHDL source code, a simple CPU, Adder, Divider, counters, etc.
Platform: | Size: 45056 | Author: 刘建 | Hits:

[VHDL-FPGA-Verilogtbcpu8bit2

Description: 极小的CPU的VHDL源代码,仅需要占用32个宏单元的CPLD。除了VHDL源代码还包括了汇编器的C源代码-minimal CPU VHDL source code, only occupy 32 macrocell CPLD. Apart from VHDL source code also includes a compilation of C source code
Platform: | Size: 205824 | Author: 冰激凌 | Hits:

[MiddleWarecpu_intf

Description: cpu的VHDL的源代码,功能的简单实现-cpu VHDL source code, the function of a simple realization
Platform: | Size: 1024 | Author: 陈娟娟 | Hits:

[VHDL-FPGA-Verilogthe-design-of-16-bit-cpu

Description: 用vhdl硬件语言设计的16位cpu,上传的压缩包既包含源代码又包含详细的文档说明。-with vhdl hardware design language of the 16 cpu, Upload compressed contains both the source code also contains a detailed document shows.
Platform: | Size: 128000 | Author: 晶晶 | Hits:

[Software Engineeringcpu-16-vhdl

Description: 16位cpu的vhdl源代码。 自己看看,没有注释。-16 cpu vhdl the source code. See for yourself, not Notes.
Platform: | Size: 95232 | Author: 童宗挺 | Hits:

[VHDL-FPGA-Verilogcpu-leon3-altera-ep1c20

Description: 一个使用VHDL设计的具有强大功能的32位CPU,这个文件包含了在Altera公司的ep1c20 FPGA的位码文件和配置文件,可以直接下载使用!-A VHDL design with the use of powerful 32-bit CPU, this document contains Altera Corporation in the ep1c20 FPGA code and configuration files, you can direct download!
Platform: | Size: 687104 | Author: zhao onely | Hits:

[Othercpu

Description: 初学cpu设计(完全教程)包括verilog代码以及文档说明那个-Beginner cpu design (complete tutorial) includes a Verilog code as well as the document explains that
Platform: | Size: 366592 | Author: hjx | Hits:

[VHDL-FPGA-VerilogCPU

Description: 简单的16位CPU的VHDL设计 vhdl代码和cpu设计过程-Simple 16-bit CPU design of the VHDL code and VHDL design process cpu
Platform: | Size: 1488896 | Author: kilva | Hits:

[VHDL-FPGA-VerilogMyCPU16

Description: 16位cpu设计VHDL源码,其中包括alu,clock,memory等部分的设计-16 cpu design VHDL source code, including alu, clock, memory and other parts of the design
Platform: | Size: 1089536 | Author: 孙冰 | Hits:

[VHDL-FPGA-VerilogLC3-code.tar

Description: 美国计算机界泰斗级作者Yale N. Patt的LC3 CPU VHDL源码,配合《计算机系统概论》一书学习效果更佳!-The United States computer industry Author greatest level Yale N. Patt of LC3 CPU VHDL source code, with
Platform: | Size: 11264 | Author: guo | Hits:

[VHDL-FPGA-VerilogLC3-VHDL-another

Description: 另一套LC3 CPU VHDL源码及设计文档,对LC3进行了一些取舍和改造,比如NZP改为NZC,更贴近现实CPU硬件架构。按照ASM进行VHDL编码,更适合数字设计初学者学习。-Another set of LC3 CPU VHDL source code and design documents, of LC3 to a number of trade-offs and transformation, such as NZP changed NZC, more close to reality CPU hardware architecture. In accordance with the ASM to VHDL coding, digital design more suitable for beginners to learn.
Platform: | Size: 808960 | Author: guo | Hits:

[VHDL-FPGA-Verilogpcpu

Description: 可以实现CPU的VHDL源码,可以在FPGA上运行-CPU can realize the VHDL source code can be run in FPGA
Platform: | Size: 1651712 | Author: chen | Hits:

[VHDL-FPGA-Verilog8-cpu

Description: 8位CPU的VHDL设计,16条指令系统,以及部分测试代码,开发工具是quartusii_60_pc-8-bit CPU of the VHDL design, 16 instruction, as well as some of the test code, development tools is quartusii_60_pc
Platform: | Size: 3072 | Author: FJ | Hits:

[ARM-PowerPC-ColdFire-MIPSMIPStest00

Description: 簡易MIPS CPU程式碼 此CPU包含 shift add sub and or stl beq lw sw 等功能-Simple MIPS CPU code for this CPU contains shift add sub and or stl beq lw sw functions
Platform: | Size: 7168 | Author: chen | Hits:

[VHDL-FPGA-VerilogCPU_16

Description: vhdl语言的16b cpu代码 全部的代码我会依次上传 另有说明txt文本-VHDL language 16b cpu code all the code I will upload the text otherwise stated txt
Platform: | Size: 1024 | Author: 闵瑞鑫 | Hits:

[Compress-Decompress algrithmscpu

Description: this file is cpu code in vhdl
Platform: | Size: 1024 | Author: aydin | Hits:
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