Search - vhdl crc

[VHDL-FPGA-Verilog] CRC校验参考设计_xilinx_vhdl

Description: 可配置CRC参考设计 xilinx提供的VHDL-configurable CRC reference design for Xilinx VHDL
Platform: | Size: 49152 | Author: 陈旭 | Hits:

[Embeded-SCM Develop] 卷积码、CRC

Description: 卷积码的C源程序，包括编码器和译码器。还有一个是循环荣誉校验的vhdl]源码。-convolution of C source code, including the encoder and decoder. There is a cycle of the calibration honor VHDL] source.
Platform: | Size: 6144 | Author: 潘华林 | Hits:

[SCM] crc 51

Description: 51单片机的CRC程序，此程序是通过查表的办法进行计算，对于51单片机相当适用-51 SCM CRC procedure, this procedure is through the look-up table approach, for quite applicable MCU 51
Platform: | Size: 3072 | Author: 郭子旺 | Hits:

[Communication] crc上传程序

Description: 写CRC编解码程序时，整理的文件，压缩文件既有理论说明，也有源代码。源代码格式用C,VHDL,Verilog。-write CRC codec procedures, collating documents, compressed files both theoretical statements, and the active code. Source code format C, VHDL, Verilog.
Platform: | Size: 706560 | Author: cdl | Hits:

[Other] desigingCRCwithVDHL

Description: 用VHDL设计CRC发生器和校验器，供初学者参考。-CRC generator and calibration device for advanced users.
Platform: | Size: 112640 | Author: 小山 | Hits:

[VHDL-FPGA-Verilog] CRC32_VHDL_SOURCE_CODE

Description: 这是利用VHDL编写的一个CRC32的代码，文档只有代码，具体原理请参考其他文献-This is the use of VHDL prepared a CRC32-code, the document is only a code Please refer to specific tenets of other literature
Platform: | Size: 7168 | Author: 黎飞飞 | Hits:

[VHDL-FPGA-Verilog] CRC_module_of_FPGA

Description: 利用VHDL语言编写的一个crc功能模块，可下载到FPGA实现功能-use VHDL to prepare a crc function of the module, which can be downloaded to the FPGA functions
Platform: | Size: 3072 | Author: 黎飞飞 | Hits:

[SCM] CRC

Description: 循环冗余码校验（CRC）是一种可靠性很高的串行数据校验方法。介质循环冗余码校验的基本原理，并分别用单片机和CPLD作了循环冗余码验的软件实现和硬件实现。包括汇编语言和VHDL语言源程序-Cyclical redundancy check (CRC) is a high reliability of the serial data validation methods. Media cyclical redundancy check of the basic principles, and were made with MCU and CPLD Cyclic Redundancy Code inspection software and hardware realize realize. Including assembly language and VHDL language source
Platform: | Size: 14336 | Author: llhg | Hits:

[Crack Hack] crc

Description: 基于FPGA的crc设计，有一定的参考价值，写的比较详细-CRC FPGA-based design, has a certain reference value, a more detailed written
Platform: | Size: 18432 | Author: qlg | Hits:

[VHDL-FPGA-Verilog] crc

Description: 可以直接用于工程应用的crc校验VHDL编码里面有详细的规格书-Can be directly used for engineering applications of CRC checksum inside VHDL code has detailed specifications
Platform: | Size: 90112 | Author: 毋杰 | Hits:

[Crack Hack] crc

Description: CRC码产生器与校验器程序 Features ： Executes in one clock cycle per data word Any polynomial from 4 to 32 bits Any data width from 1 to 256 bits Any initialization value Synchronous or asynchronous reset-CRC code generator and calibration program Features: Executes in one clock cycle per data word Any polynomial from 4 to 32 bits Any data width from 1 to 256 bits Any initialization value Synchronous or asynchronous reset
Platform: | Size: 5120 | Author: Alex | Hits:

[Crack Hack] crc

Description: CRC校验码的实现，校验码6位，寄存器串行实现方式，经项目实际验证正确-CRC Check Code realization Check 6, register serial ways, the right to verify the actual project
Platform: | Size: 1024 | Author: fang | Hits:

[Software Engineering] CRC

Description: 　本文提出一种通用的CRC 并行计算原理及实现方法,适于不同的CRC 生成多项式和不同并行度(如8 位、16 位、及32 位等) ,与目前已采用的查表法比较,不需要存放余数表的高速存储器,减少了时延,且可通过增加并行度来降低高速数传系统的CRC 运算时钟频率.-In this paper, a universal principle of CRC and implementation of parallel computing methods for generating different CRC polynomial and different degree of parallelism (eg, 8, 16, and 32-bit, etc.), with the current look-up table method has been used in comparison do not store more than a few tables, high-speed memory, reducing latency, and degree of parallelism can be increased to reduce the high-speed data-transmission system clock frequency of the CRC computation.
Platform: | Size: 144384 | Author: 黑月 | Hits:

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[VHDL-FPGA-Verilog] CRC校验参考设计_xilinx_vhdl

[Embeded-SCM Develop] 卷积码、CRC

[SCM] crc 51

[Communication] crc上传程序

[Other] desigingCRCwithVDHL

[VHDL-FPGA-Verilog] CRC32_VHDL_SOURCE_CODE

[VHDL-FPGA-Verilog] CRC_module_of_FPGA

[SCM] CRC

[Crack Hack] crc

[VHDL-FPGA-Verilog] crc

[Crack Hack] crc

[Crack Hack] crc

[Software Engineering] CRC

[Embeded-SCM Develop] CRC

[VHDL-FPGA-Verilog] crc

[VHDL-FPGA-Verilog] crc

[VHDL-FPGA-Verilog] CRC

[VHDL-FPGA-Verilog] crc

[VHDL-FPGA-Verilog] CRC-Generator-for-Verilog-or-VHDL

[VHDL-FPGA-Verilog] crc

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